PHP/PHB/PHD14NQ20T
TrenchMOS™ standard level FET
Rev. 03 — 11 March 2002
Product data
1. Product profile
1.1 Description
N-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOS™ technology.
Product availability:
PHP14NQ20T in SOT78 (TO-220AB)
PHB14NQ20T in SOT404 (D
2
-PAK)
PHD14NQ20T in SOT428 (D-PAK).
1.2 Features
s
Low on-state resistance
s
Fast switching
1.3 Applications
s
DC to DC converters
s
General purpose switching
1.4 Quick reference data
s
V
DS
= 200 V
s
R
DSon
≤
230 mΩ
s
I
D
= 14 A
s
P
D
= 125 W
2. Pinning information
Table 1:
Pin
1
2
3
mb
Pinning - SOT78, SOT404, SOT428, simplified outline and symbol
Description
gate (g)
drain (d)
source (s)
mounting base,
connected to
drain (d)
2
1
MBK106
Simplified outline
[1]
mb
mb
mb
Symbol
d
g
s
MBB076
2
1
3
MBK116
3
MBK091
Top view
1 2 3
SOT78 (TO-220AB)
[1]
SOT404 (D
2
-PAK)
SOT428 (D-PAK)
It is not possible to make connection to pin 2 of the SOT404 or SOT428 packages.
Philips Semiconductors
PHP/PHB/PHD14NQ20T
TrenchMOS™ standard level FET
3. Limiting values
Table 2:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
DS
V
DGR
V
GS
I
D
drain-source voltage (DC)
drain-gate voltage (DC)
gate-source voltage
drain current (DC)
V
GS
= 10 V;
Figure 2
and
3
T
mb
= 25
°C
T
mb
= 100
°C
I
DM
P
tot
T
stg
T
j
I
S
I
SM
peak drain current
total power dissipation
storage temperature
operating junction temperature
source (diode forward) current (DC)
peak source (diode forward) current
T
mb
= 25
°C
T
mb
= 25
°C;
pulsed; t
p
≤
10
µs
T
mb
= 25
°C;
pulsed; t
p
≤
10
µs;
Figure 3
T
mb
= 25
°C;
Figure 1
-
-
-
-
−55
−55
-
-
-
-
14
10
56
125
+175
+175
14
56
70
14
A
A
A
W
°C
°C
A
A
mJ
A
Conditions
T
j
= 25 to 175
o
C
T
j
= 25 to 175
o
C; R
GS
= 20 kΩ
Min
-
-
-
Max
200
200
±20
Unit
V
V
V
Source-drain diode
Avalanche ruggedness
E
DS(ALS)
non-repetitive avalanche energy
I
DS(ALM)
unclamped inductive load; I
D
= 14 A;
peak non-repetitive avalanche current t
p
= 20
µs;
V
DD
≤
25 V; R
GS
= 50
Ω;
V
GS
= 10 V; starting T
j
= 25
°C;
Figure 15
9397 750 09535
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 03 — 11 March 2002
2 of 14
Philips Semiconductors
PHP/PHB/PHD14NQ20T
TrenchMOS™ standard level FET
03aa16
120
Pder
120
I
der
(%)
03aa24
(%)
80
80
40
40
0
0
50
100
150
200
o
Tmb ( C)
0
0
50
100
150
200
o
Tmb ( C)
P
tot
P
der
=
----------------------
×
100%
-
P
°
tot
(
25 C
)
V
GS
≥
10 V
I
D
I
der
=
-------------------
×
100%
I
°
D
(
25 C
)
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Normalized continuous drain current as a
function of mounting base temperature.
003aaa219
103
ID
(A)
102
RDSon = VDS / ID
tp =
1
µs
10
µs
10
100
µs
1 ms
DC
1
10 ms
100 ms
10-1
1
10
102
VDS (V)
103
T
mb
= 25
°C;
I
DM
is single pulse
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 09535
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 03 — 11 March 2002
3 of 14
Philips Semiconductors
PHP/PHB/PHD14NQ20T
TrenchMOS™ standard level FET
4. Thermal characteristics
Table 3:
R
th(j-mb)
R
th(j-a)
Thermal characteristics
Conditions
Figure 4
vertical in still air; SOT78 package
Min Typ
-
-
-
60
50
Max Unit
1.2
-
-
K/W
K/W
K/W
thermal resistance from junction to mounting
base
thermal resistance from junction to ambient
Symbol Parameter
SOT404 and SOT428 packages;
-
SOT404 minimum footprint; mounted on
a PCB
4.1 Transient thermal impedance
003aaa220
10
Zth (j-mb)
(K/W)
1
δ
= 0.5
δ
= 0.2
δ
= 0.1
10-1
δ
= 0.05
δ
= 0.02
single pulse
P
δ
=
tp
T
tp
T
t
10-2
10-6
10-5
10-4
10-3
10-2
10-1
1
tp (s)
10
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 09535
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 03 — 11 March 2002
4 of 14
Philips Semiconductors
PHP/PHB/PHD14NQ20T
TrenchMOS™ standard level FET
5. Characteristics
Table 4:
Characteristics
T
j
= 25
°
C unless otherwise specified.
Symbol
V
(BR)DSS
Parameter
drain-source breakdown voltage
Conditions
I
D
= 250
µA;
V
GS
= 0 V
T
j
= 25
°C
T
j
=
−55 °C
V
GS(th)
gate-source threshold voltage
I
D
= 1 mA; V
DS
= V
GS
;
Figure 9
T
j
= 25
°C
T
j
= 175
°C
T
j
=
−55 °C
I
DSS
drain-source leakage current
V
DS
= 200 V; V
GS
= 0 V
T
j
= 25
°C
T
j
= 175
°C
I
GSS
R
DSon
gate-source leakage current
drain-source on-state resistance
V
GS
=
±10
V; V
DS
= 0 V
V
GS
= 10 V; I
D
= 7 A;
Figure 7
and
8
T
j
= 25
°C
T
j
= 175
°C
Dynamic characteristics
g
fs
Q
g(tot)
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
V
SD
t
rr
Q
r
forward transconductance
total gate charge
gate-source charge
gate-drain (Miller) charge
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
turn-off delay time
fall time
source-drain (diode forward)
voltage
reverse recovery time
recovered charge
I
S
= 14 A; V
GS
= 0 V;
Figure 12
I
S
= 14 A;
dI
S
/dt =
−100
A/µs;
V
GS
= 0 V; V
R
= 30 V
V
DD
= 30 V; R
D
= 10
Ω;
V
GS
= 10 V; R
GS
= 50
Ω;
R
gen
= 50
Ω
V
GS
= 0 V; V
DS
= 25 V;
f = 1 MHz;
Figure 11
V
DS
= 25 V; I
D
= 7 A;
Figure 14
I
D
= 14 A; V
DD
= 160 V;
V
GS
= 10 V;
Figure 13
6
-
-
-
-
-
-
-
-
-
-
-
-
-
12.1
38
4
13.3
1500
128
60
25
40
83
31
1.0
135
690
-
-
-
-
-
-
-
-
-
-
-
1.5
-
-
S
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
V
ns
nC
-
-
150
-
230
633
mΩ
mΩ
-
-
-
0.05
-
10
10
500
100
µA
µA
nA
2
1
-
3
-
-
4
-
6
V
V
V
200
178
-
-
-
-
V
V
Min
Typ
Max
Unit
Static characteristics
Source-drain diode
9397 750 09535
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 03 — 11 March 2002
5 of 14