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QL4058-4PQ240I

Field Programmable Gate Array, 1008 CLBs, 131328 Gates, 377.1MHz, 1008-Cell, CMOS, PQFP240, 32 X 32 MM, 3.40 MM HEIGHT, PLASTIC, QFP-240

器件类别:可编程逻辑器件    可编程逻辑   

厂商名称:QuickLogic Corporation

厂商官网:https://www.quicklogic.com

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器件参数
参数名称
属性值
是否无铅
含铅
是否Rohs认证
不符合
厂商名称
QuickLogic Corporation
零件包装代码
QFP
包装说明
FQFP, QFP240,1.3SQ,20
针数
240
Reach Compliance Code
compliant
最大时钟频率
377.1 MHz
CLB-Max的组合延迟
2.624 ns
JESD-30 代码
S-PQFP-G240
JESD-609代码
e0
长度
32 mm
湿度敏感等级
3
可配置逻辑块数量
1008
等效关口数量
131328
输入次数
202
逻辑单元数量
1008
输出次数
194
端子数量
240
最高工作温度
85 °C
最低工作温度
-40 °C
组织
1008 CLBS, 131328 GATES
封装主体材料
PLASTIC/EPOXY
封装代码
FQFP
封装等效代码
QFP240,1.3SQ,20
封装形状
SQUARE
封装形式
FLATPACK, FINE PITCH
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
3.3,3.3/5 V
可编程逻辑类型
FIELD PROGRAMMABLE GATE ARRAY
认证状态
Not Qualified
座面最大高度
4.1 mm
最大供电电压
3.6 V
最小供电电压
3 V
标称供电电压
3.3 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
GULL WING
端子节距
0.5 mm
端子位置
QUAD
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
32 mm
文档预览
QL4058
58,000 Usable PLD Gate QuickRAM
®
ESP
Combining Performance, Density,
and
Embedded RAM
Last Updated: April 15, 1999
QuickRAM
HIGHLIGHTS
High Performance and High Density
- 58,000 Usable PLD Gates with 252 I/Os
- 300 MHz 16-bit Counters, 400 MHz Datapaths, 160+ MHz FIFOs
- 0.35µm four-layer metal non-volatile CMOS process for smallest die sizes
… 58,000
usable PLD gates,
252 I/O pins
High Speed Embedded SRAM
- 18 dual-port RAM modules, organized in user-configurable 1,152-bit blocks
- 5ns access times, each port independently accessible
- Fast and efficient for FIFO, RAM, and ROM functions
Easy to Use / Fast Development Cycles
- 100% routable with 100% utilization and complete pin-out stability
- Variable-grain logic cells provide high performance and 100% utilization
- Comprehensive design tools include high quality Verilog/VHDL synthesis
Advanced I/O Capabilities
- Interfaces with both 3.3 volt and 5.0 volt devices
- PCI compliant with 3.3V and 5.0V buses for -1/-2/-3/-4 speed grades
- Full JTAG boundary scan
- Registered I/O cells with individually controlled clocks and output enables
QL4058
Block Diagram
1,008
Logic Cells
18 RAM
Modules
(20,736 bits)
3-48
QL4058 Rev G
QL4058
3-49
QL4058 Rev G
QL4058
PRODUCT
SUMMARY
The QuickRAM family of ESPs (Embedded Standard Products) offers FPGA
logic in combination with Dual-Port SRAM modules. The QL4058 is a
58,000 usable PLD gate member of the QuickRAM family of ESPs.
QuickRAM ESPs are fabricated on a 0.35µm four-layer metal process using
QuickLogic’s patented ViaLink technology to provide a unique combination
of high performance, high density, low cost, and extreme ease-of-use.
The QL4058 contains 1,008 logic cells and 18 dual port RAM modules.
Each RAM module has 1,152 RAM bits, for a total of 20,736 bits. RAM
Modules are Dual Port (one read port, one write port) and can be configured
into one of four modes: 64 (deep) x18 (wide), 128x9, 256x4, or 512x2. With
a maximum of 252 I/Os, the QL4058 is available in 208-pin PQFP, 240-pin
PQFP, and 456-pin PBGA packages.
Software support for the complete QuickRAM family, including the QL4058,
is available through three basic packages. The turnkey QuickWorks
®
package provides the most complete ESP software solution from design entry
to logic synthesis, to place and route, to simulation. The QuickWorks-Lite
QuickTools
TM
packages provide a solution for designers who use Cadence,
Exemplar, Mentor, Synopsys, Synplicity, Viewlogic, Veribest, or other third-
party tools for design entry, synthesis, or simulation.
FEATURES
Total of 252 I/O Pins
- 244 bi-directional input/output pins, PCI-compliant for
5.0 volt and 3.3 volt buses for -1/-2/-3/-4 speed grades
- 8 high-drive input/distributed network pins
Eight Low-Skew Distributed Networks
- Two array clock/control networks available to the logic cell flip-flop
clock, set and reset inputs - each driven by an input-only pin
- Six global clock/control networks available to the logic cell F1, clock,
set and reset inputs and the input and I/O register clock, reset and
enable
inputs as well as the output enable control - each driven by an input-
only
or I/O pin, or any logic cell output or I/O cell feedback
High Performance
- Input + logic cell + output total delays under 6 ns
- Data path speeds exceeding 400 MHz
- Counter speeds over 300 MHz
- FIFO speeds over 160+ MHz
3-50
QL4058 Rev G
QL4058
PINOUT DIAGRAMS
PIN # 157
208-PIN PQFP
PIN # 1
QuickRAM
QL4058-1PQ208C
PIN # 105
PIN # 53
240-PIN PQFP
PIN # 1
PIN # 181
p
ASIC
QL3060-1PQ240C
PIN # 61
3-51
PIN # 121
QL4058 Rev G
QL4058
PQFP 240 / 208 Pinout Table
240
208
Function
240
208
PQFP PQFP
PQFP PQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
208
1
2
3
4
5
NC
6
7
8
9
10
11
12
13
14
NC
15
16
17
18
19
20
NC
21
22
23
24
25
26
27
28
29
30
31
32
NC
33
NC
34
35
36
NC
37
38
39
NC
40
41
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
GCLK / I
ACLK / I
VCC
GCLK / I
GCLK / I
VCC
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
51
52
53
54
55
56
57
58
59
60
NC
NC
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
NC
84
85
86
87
88
89
90
91
92
93
94
95
96
43
44
45
46
47
48
NC
49
50
51
52
53
54
NC
NC
55
56
NC
57
58
59
60
61
62
63
64
NC
65
66
67
NC
68
69
70
NC
71
NC
72
73
74
NC
75
76
77
78
79
80
81
82
Function
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
TDI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
VCC
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
240
208
PQFP PQFP
98
99
100
101
102
103
104
105
106
107
108
109
110
NC
111
NC
NC
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
84
85
86
87
88
89
90
91
92
NC
93
94
95
96
97
98
99
100
NC
101
NC
102
NC
NC
103
104
105
NC
106
107
108
109
NC
110
111
112
113
114
115
116
117
NC
118
119
120
121
NC
122
123
Function
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
TRSTB
TMS
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
240
208 Function
240
208
PQFP PQFP
PQFP PQFP
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
NC
181
182
183
184
185
186
187
188
189
190
191
192
125
126
127
128
NC
129
130
131
132
133
134
135
136
NC
137
NC
138
139
140
141
142
NC
143
144
145
NC
146
147
148
149
150
151
152
153
154
155
156
157
158
NC
159
160
161
162
163
164
165
166
NC
I/O
I/O
GND
I/O
I/O
GCLK / I
ACLK / I
VCC
GCLK / I
GCLK / I
VCC
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
TCK
STM
I/O
I/O
I/O
I/O
I/O
GND
I/O
VCC
I/O
I/O
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
168
169
NC
170
171
172
173
174
175
NC
176
177
178
179
NC
180
181
182
NC
183
184
185
186
187
188
NC
189
190
191
192
193
194
NC
195
196
197
198
NC
199
200
201
202
203
204
205
206
207
Function
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
GND
VCC
I/O
I/O
I/O
I/O
VCCIO
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
VCC
I/O
I/O
I/O
I/O
I/O
TDO
3-52
QL4058 Rev G
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