RFP45N06LE, RF1S45N06LESM
Data Sheet
October 1999
File Number
4076.2
45A, 60V, 0.028 Ohm, Logic Level
N-Channel Power MOSFETs
Title
FP4
06L
1S4
06L
M)
b-
t
A,
V,
28
m,
gic
vel
an-
wer
OS-
Ts)
utho
ey-
rds
ter-
rpo-
on,
gic
vel
an-
wer
OS-
Ts,
-
0AB
Packaging
JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
Features
• 45A, 60V
• r
DS(ON)
= 0.028
Ω
• Temperature Compensating PSPICE
®
Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 175
o
C Operating Temperature
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
These are N-Channel enhancement mode power MOSFETs
manufactured using the latest manufacturing process
technology. This process, which uses feature sizes
approaching those of LSI circuits, gives optimum utilization
of silicon, resulting in outstanding performance. They were
designed for use in applications such as switching
regulators, switching converters, motor drivers, and relay
drivers. These transistors can be operated directly from
integrated circuits.
Formerly developmental type TA49177.
Ordering Information
PART NUMBER
RFP45N06LE
RF1S45N06LESM
PACKAGE
TO-220AB
TO-263AB
BRAND
FP45N06L
F45N06LE
Symbol
D
G
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-263AB variant in tape and reel i.e., RF1S45N06LESM9A.
S
JEDEC TO-263AB
DRAIN
(FLANGE)
GATE
SOURCE
©2001 Fairchild Semiconductor Corporation
RFP45N06LE, RF1S45N06LESM Rev. A
RFP45N06LE, RF1S45N06LESM
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
RFP45N06LE, RF1S45N06LESM
60
60
±
10
45
Refer to Peak Current Curve
Refer to UIS Curve
142
0.95
-55 to 175
300
260
UNITS
V
V
V
A
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
Drain to Gate Voltage (R
GS
= 20k
Ω)
(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
DM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate Above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
W
W/
o
C
o
C
o
C
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 150
o
C.
Electrical Specifications
PARAMETER
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
BV
DSS
V
GS(TH)
I
DSS
I
GSS
r
DS(ON)
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
Q
g(TOT)
Q
g(5)
Q
g(TH)
C
ISS
C
OSS
C
RSS
R
θ
JC
R
θ
JA
TO-220, and TO-263
V
GS
= 0V to 10V
V
GS
= 0V to 5V
V
GS
= 0V to 1V
V
DD
= 48V,
I
D
= 45A,
R
L
= 1.07
Ω
(Figures 20, 21)
TEST CONDITIONS
I
D
= 250
µ
A, V
GS
= 0V (Figure 13)
V
GS
= V
DS
, I
D
= 250
µ
A (Figure 12)
V
DS
= 55V, V
GS
= 0V
V
DS
= 50V, V
GS
= 0V, T
C
= 150
o
C
V
GS
=
±
10V
I
D
= 45A, V
GS
= 5V (Figure 11)
V
DD
= 30V, I
D
= 45A, R
L
= 0.67
Ω
,
V
GS
= 5V, R
GS
= 2.5
Ω
(Figures 10, 18, 19)
MIN
60
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP
-
-
-
-
-
-
-
20
150
55
90
-
107
58
2.4
2150
640
240
-
-
MAX
-
3
1
250
10
0.028
215
-
-
-
-
185
135
75
3.0
-
-
-
1.05
80
UNITS
V
V
µ
A
µ
A
µ
A
Ω
ns
ns
ns
ns
ns
ns
nC
nC
nC
pF
pF
pF
o
C/W
o
C/W
Drain to Source Breakdown Voltage
Gate Threshold Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
Total Gate Charge
Gate Charge at 5V
Threshold Gate Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
V
DS
= 25V, V
GS
= 0V, f = 1MHz
(Figure 14)
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
Diode Reverse Recovery Time
NOTES:
2. Pulse test: pulse width
≤
80
µ
s, duty cycle
≤
2%.
3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
SYMBOL
V
SD
t
rr
I
SD
= 45A
I
SD
= 45A, dI
SD
/dt = 100A/
µ
s
TEST CONDITIONS
MIN
-
-
TYP
-
-
MAX
1.5
155
UNITS
V
ns
©2001 Fairchild Semiconductor Corporation
RFP45N06LE, RF1S45N06LESM Rev. A
RFP45N06LE, RF1S45N06LESM
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
Unless Otherwise Specified
50
1.0
0.8
0.6
0.4
0.2
0
I
D
, DRAIN CURRENT (A)
40
30
20
10
0
25
50
75
100
125
T
C
, CASE TEMPERATURE (
o
C)
150
175
0
25
50
75
100
125
T
C
, CASE TEMPERATURE (
o
C)
150
175
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
2
1
0.5
0.2
0.1
0.1
0.05
0.02
0.01
P
DM
t
1
t
2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θ
JC
x R
θ
JC
+ T
C
10
-3
10
-2
10
-1
t, RECTANGULAR PULSE DURATION (s)
10
0
10
1
Z
θ
JC
, NORMALIZED
THERMAL IMPEDANCE
0.01
10
-5
10
-4
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
500
I
DM
, PEAK CURRENT CAPABILITY (A)
T
C
= 25
o
C
T
J
= MAX RATED
500
V
GS
= 10V
T
C
= 25
o
C
I
D
, DRAIN CURRENT (A)
100
100µs
V
GS
= 5V
100
1ms
10
10ms
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
1
1
10
100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
200
THERMAL IMPEDANCE
MAY LIMIT CURRENT
IN THIS REGION
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
I
=
I
25
10
10
-5
175 - T
C
150
10
0
10
1
10
-4
10
-3
10
-2
10
-1
t, PULSE WIDTH (s)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. PEAK CURRENT CAPABILITY
©2001 Fairchild Semiconductor Corporation
RFP45N06LE, RF1S45N06LESM Rev. A
RFP45N06LE, RF1S45N06LESM
Typical Performance Curves
200
I
AS
, AVALANCHE CURRENT (A)
100
I
D
, DRAIN CURRENT (A)
80
Unless Otherwise Specified
(Continued)
100
V
GS
= 10V
V
GS
= 5V
V
GS
= 4V
STARTING T
J
= 25
o
C
10
STARTING T
J
= 150
o
C
If R = 0
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R
≠
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
- V
DD
) +1]
0.1
1
10
t
AV
, TIME IN AVALANCHE (ms)
100
60
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
T
C
= 25
o
C
V
GS
= 3.5V
40
V
GS
= 3V
20
V
GS
= 2.5V
0
1
0.01
0
1.5
3.0
4.5
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
6.0
NOTE: Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
FIGURE 7. SATURATION CHARACTERISTICS
I
DS(ON)
, DRAIN TO SOURCE CURRENT (A)
100
V
DD
= 15V
80
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
-55
o
C
25
o
C
r
DS(ON)
, DRAIN TO SOURCE
80
I
D
= 45A
ON RESISTANCE (mΩ)
60
I
D
= 11.25A
40
I
D
= 22.5A
20
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0
2.0
2.5
3.0
3.5
4.0
4.5
5.0
I
D
= 90A
175
o
C
60
40
20
0
0
1.5
3.0
4.5
V
GS
, GATE TO SOURCE VOLTAGE (V)
6.0
V
GS
, GATE TO SOURCE VOLTAGE (V)
FIGURE 8. TRANSFER CHARACTERISTICS
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
600
V
DD
= 30V, I
D
= 45A, R
L
= 0.67Ω
500
SWITCHING TIME (ns)
t
d(OFF)
400
t
f
300
200
100
0
0
10
20
30
40
50
R
GS
, GATE TO SOURCE RESISTANCE (Ω)
t
d(ON)
NORMALIZED ON RESISTANCE
t
r
2.5
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
GS
= 5V, I
D
= 45A
2.0
1.5
1.0
0.5
-80
-40
0
40
80
120
T
J
, JUNCTION TEMPERATURE (
o
C)
160
200
FIGURE 10. SWITCHING TIME vs GATE RESISTANCE
FIGURE 11. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
©2001 Fairchild Semiconductor Corporation
RFP45N06LE, RF1S45N06LESM Rev. A
RFP45N06LE, RF1S45N06LESM
Typical Performance Curves
1.2
Unless Otherwise Specified
(Continued)
1.2
I
D
= 250µA
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
V
GS
= V
DS
, I
D
= 250µA
NORMALIZED GATE
THRESHOLD VOLTAGE
1.0
1.1
0.8
1.0
0.6
0.9
0.4
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
200
0.8
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
200
FIGURE 12. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
3000
FIGURE 13. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
60
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
DD
= BV
DSS
45
R
L
= 1.3Ω
I
G(REF)
= 1.3mA
V
GS
= 5V
30
PLATEAU VOLTAGES IN
DESCENDING ORDER:
V
DD
= BV
DSS
V
DD
= 0.75 BV
DSS
V
DD
= 0.50 BV
DSS
V
DD
= 0.25 BV
DSS
2.50
V
DD
= BV
DSS
3.75
5.00
V
GS
, GATE TO SOURCE VOLTAGE (V)
2500
C, CAPACITANCE (pF)
C
ISS
2000
1500
1000
C
OSS
500
0
C
RSS
0
5
10
15
20
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
25
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
≈
C
DS
+ C
GD
15
1.25
0
-
20
---------------------
I G
(
ACT
)
I G
(
REF
)
t, TIME (µs)
-
80
---------------------
I G
(
ACT
)
I G
(
REF
)
0
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 14. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 15. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
V
DS
BV
DSS
L
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
V
GS
DUT
t
P
R
G
-
I
AS
V
DD
t
P
V
DS
V
DD
+
0V
I
AS
0.01Ω
0
t
AV
FIGURE 16. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 17. UNCLAMPED ENERGY WAVEFORMS
©2001 Fairchild Semiconductor Corporation
RFP45N06LE, RF1S45N06LESM Rev. A
