LVDS & LVPECL FPGA Terminator
Technical
Data Sheet
RoHS Compliant Parts Available
Description
These LVPECL and LVDS termination networks are designed for high
performance termination of differential Input/Output signals on some of
the most popular Field Programmable Gate Arrays (FPGAs).
Both input (RX) and output (TX) termination is provided.
Features
•
•
•
•
•
Designed for termination of Xilinx® and Altera® FPGAs.
8 or 16 differential channels of termination provided in a single
integrated package
Excellent high frequency performance
High density ceramic BGA package
RoHS Compliant Designs Available
•
Compatible with both lead and lead-free manufacturing
processes
Style C
4
R1
R1
R1
R1
R1
R1
R1
R1
Style I
4
R1
R2
R1
R1
R2
R1
R1
R2
R1
R2
R1
R1
R1
R2
R1
R1
R2
R1
R1
R2
R1
R2
R1
R1
3
3
2
R1
R1
R1
R1
C
D
E
R1
R1
F
G
R1
R1
2
R1
R2
R1
R1
R2
R1
C
D
R1
R2
R1
E
F
R1
R2
R1
G
H
R1
R2
R1
R1
R2
R1
R1
R2
R1
R1
R2
R1
1
A
B
H
1
A
B
J
K
L
M
N
P
R
T
Electrical Specifications
Resistor Tolerance:
TCR
Operating Temperature Range
Maximum Resistor Power:
Maximum Package Power:
Process Requirements:
Maximum Re-flow Temperature
±
1.0%
±200ppm/°C
-55°C to +125°C
0.068 Watts at 70°C
1.0 Watts at 70°C
Per IPC/JEDEC J-STD-020C
Typical Application
Tx Termination
R1
Rx Termination
Tx
R2
Z = 50 ohms
R1
Rx
R1
Ordering Information
1.27mm Pitch
Standard Part
No.
RT1710B6
-
RT1721B6
-
RT1723B6
-
RT1725B6
1.00mm Pitch
Standard Part
No.
RT1710B7
RT1720B7
RT1721B7
RT1722B7
RT1723B7
RT1724B7
RT1725B7
Style
R1
Ω
R2
Ω
Array
Size
4x8
4 x 16
4x8
4 x 16
4x8
4 x 16
4x8
1.27mm Pitch 1.00mm Pitch
RoHS Part No. RoHS Part No.
RT2710B6
-
RT2721B6
-
RT2723B6
-
RT2725B6
RT2710B7
RT2720B7
RT2721B7
RT2722B7
RT2723B7
RT2724B7
RT2725B7
Part Number Coding
7 inch reel, Add TR7 to part
number, example RT2400B6TR7
13 inch reel, Add TR13 to part
number, example RT2400B6TR13
(Bulk packaging is not available)
C
I
I
I
I
I
I
100
187
187
140
140
140
140
-
100
100
165
165
135
135
Direction of Feed
Packaging Information
Suffix
Tape Width
Carrier Pitch
Reel Diameter
Parts/Reel
TR7
24 mm
8 mm
7 inch
1,000
TR13
24mm
8 mm
13 inch
4,000
CTS Electronic Components
www.ctscorp.com
© 2006 CTS Corporation. All rights reserved. Information subject to change.
Page 1
LDS & LVPECL FPGA Terminator
April 06
Recommended Land Pattern
Outline of Substrate
PCB Pad Diameter
1.00mm Pitch (B7) = 0.51mm/.020 inch (minimum)
Solder Mask Dia = Pad
Diameter +.15mm (.006 inch)
For .006" Thick Solder Paste Stencil, Aperture Opening Should
be Equal to the PCB Pad Diameter.
Refer to
www.ctscorp.com/components/clearone.asp
for
additional PCB design information
Mechanical Diagram
L
H
W
RT_7__B_
CTS YRWK
P (Pitch)
A1 Identifier
K
P (Pitch)
D
1.27mm Pitch
RT1710B6
RT1721B6
RT1723B6
RT1725B6
RT1710B7
RT1721B7
RT1723B7
RT1725B7
RT1720B7
RT1722B7
RT1724B7
RT2710B6
RT2721B6
RT2723B6
RT2725B6
1.0mm Pitch
RT2710B7
RT2721B7
RT2723B7
RT2725B7
RT2720B7
RT2722B7
RT2724B7
mm
inch
mm
inch
mm
inch
L
10.16±0.15
.400±.006
L
8.00±0.15
.315±.006
16.00±0.15
.630±.006
W
5.08±0.15
.200±.006
W
4.00±0.15
.157±.006
4.00±0.15
.157±.006
H
1.32±0.15
.052±.006
H
1.19±0.15
.047±.006
1.19±0.15
.047±.006
P
1.27±0.25
.050±.010
P
1.00±0.25
.039±.010
1.00±0.25
.039±.010
D
0.76±0.05
.030±.002
D
0.64±0.05
.025±.002
0.64±0.05
.025±.002
K
0.64±0.25
.025±.010
K
0.50±0.25
.020±.010
0.50±0.25
.020±.010
Complete ClearONE Product, Processing, and Application Information can be found at the following link:
http://www.ctscorp.com/components/clearone.asp
FPGA Application notes:
http://www.ctscorp.com/components/Datasheets/ClearOneANC1FPGALVPECLA.pdf
http://www.ctscorp.com/components/Datasheets/ClearOneANC1FPGALVDSA.pdf
© 2006 CTS Corporation. All rights reserved. Information subject to change.
Page 2
LDS & LVPECL FPGA Terminator
CTS Electronic Components
www.ctscorp.com
April 06
PCB设计
