SSM9977M/GM
DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS
Simple drive requirement
Lower gate charge
Fast switching characteristics
D1
D2
D1
D2
BV
DSS
R
DS(ON)
I
D
G2
S2
60V
90mΩ
3.5A
SO-8
G1
S1
Description
Advanced Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
The SSM9977M is in the SO-8 package, which is widely preferred for
commercial and industrial surface mount applications, and is well suited
for low voltage applications such as DC/DC converters.
G1
D1
D2
G2
S1
S2
This device is available with Pb-free lead finish (second-level interconnect) as SSM9977GM.
Absolute Maximum Ratings
Symbol
V
DS
V
GS
I
D
@ T
A
=25°C
I
D
@ T
A
=100°C
I
DM
P
D
@ T
A
=25°C
T
STG
T
J
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
3
Continuous Drain Current
3
Pulsed Drain Current
1
Total Power Dissipation
Linear Derating Factor
Storage Temperature Range
Operating Junction Temperature Range
Rating
60
±
25
3.5
2.8
20
2
0.016
-55 to 150
-55 to 150
Units
V
V
A
A
A
W
W/°C
°C
°C
Thermal Data
Symbol
Rthj-a
Parameter
Thermal Resistance Junction-ambient
3
Max.
Value
62.5
Unit
°C/W
8/21/2004 Rev.2.01
www.SiliconStandard.com
1 of 5
SSM9977M/GM
Electrical Characteristics @ T
j
=25
o
C (unless otherwise specified)
Symbol
BV
DSS
Parameter
Drain-Source Breakdown Voltage
Test Conditions
V
GS
=0V, I
D
=250uA
Min.
60
-
-
-
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ.
-
0.04
-
-
-
6
-
-
-
6
2
3
6
5
16
3
510
55
35
1.3
Max. Units
-
-
90
120
3
-
10
25
±100
10
-
-
-
-
-
-
810
-
-
-
V
V/°C
mΩ
mΩ
V
S
uA
uA
nA
nC
nC
nC
ns
ns
ns
ns
pF
pF
pF
Ω
∆
BV
DSS
/
∆
Tj
R
DS(ON)
Breakdown Voltage Temperature Coefficient
Reference to
25°C, I
D
=1mA
Static Drain-Source On-Resistance
2
V
GS
=10V, I
D
=3A
V
GS
=4.5V, I
D
=2A
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
R
g
Gate Threshold Voltage
Forward Transconductance
Drain-Source Leakage Current (T
j
=25
o
C)
Drain-Source Leakage Current (T
j
=70
o
C)
V
DS
=V
GS
, I
D
=250uA
V
DS
=10V, I
D
=3A
V
DS
=60V, V
GS
=0V
V
DS
=48V, V
GS
=0V
V
GS
=±25V
I
D
=3A
V
DS
=48V
V
GS
=4.5V
V
DS
=30V
I
D
=1A
R
G
=3.3Ω , V
GS
=10V
R
D
=30Ω
V
GS
=0V
V
DS
=25V
f=1.0MHz
f=1.0MHz
Gate-Source Leakage
Total Gate Charge
2
Gate-Source Charge
Gate-Drain ("Miller") Charge
Turn-on Delay Time
2
Rise Time
Turn-off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Source-Drain Diode
Symbol
V
SD
Parameter
Forward On Voltage
2
Reverse Recovery Time
2
Reverse Recovery Charge
Test Conditions
I
S
=1.7A, V
GS
=0V
I
S
=4A,
V
GS
=0
V
,
dI/dt=100A/µs
Min.
-
-
-
Typ.
-
27
32
Max. Units
1.2
-
-
V
ns
nC
t
rr
Q
rr
Notes:
1.Pulse width limited by Max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on 1 in
2
copper pad of FR4 board, t <10sec ; 135°C/W when mounted on min. copper pad.
8/21/2004 Rev.2.01
www.SiliconStandard.com
2 of 5
SSM9977M/GM
25
25
T
A
= 25 C
20
o
10V
7.0 V
5.0V
4.5V
I
D
, Drain Current (A)
T
A
= 150 C
20
o
10V
7.0V
5.0V
4.5V
I
D
, Drain Current (A)
15
15
10
10
V
G
=3.0V
5
V
G
=3.0V
5
0
0
2
4
6
8
0
0
2
4
6
8
V
DS
, Drain-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
2.0
I
D
=2A
T
A
=25°C
R
DS(ON)
(mΩ )
90
1.8
I
D
=3A
V
G
=10V
1.6
Normalized R
DS(ON)
1.4
1.2
80
1.0
0.8
70
0.6
2
4
6
8
10
-50
0
50
100
150
V
GS
, Gate-to-Source Voltage (V)
T
j
, Junction Temperature (
o
C)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
1.8
4
1.5
Normalized V
GS(th)
(V)
1.2
3
I
S
(A)
1.2
2
T
j
=150
o
C
T
j
=25
o
C
0.9
1
0.6
0
0
0.2
0.4
0.6
0.8
1
0.3
-50
0
50
100
150
V
SD
, Source-to-Drain Voltage (V)
T
j
, Junction Temperature ( C)
o
Fig 5. Forward Characteristic of
Reverse Diode
8/21/2004 Rev.2.01
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
www.SiliconStandard.com
3 of 5
SSM9977M/GM
f=1.0MHz
14
1000
I
D
=3A
12
V
GS
, Gate to Source Voltage (V)
C
iss
V
DS
= 30 V
V
DS
= 38 V
V
DS
= 48 V
10
8
C (pF)
100
6
C
oss
4
C
rss
2
0
10
0
5
10
15
1
5
9
13
17
21
25
29
Q
G
, Total Gate Charge (nC)
V
DS
, Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100
1
Duty factor=0.5
Normalized Thermal Response (R
thja
)
0.2
10
0.1
0.1
0.05
I
D
(A)
100us
1ms
1
0.02
0.01
10ms
100ms
0.1
P
DM
0.01
Single Pulse
t
T
Duty factor = t/T
Peak T
j
= P
DM
x R
thja
+ T
a
R
thja
= 135°C/W
T
A
=25
o
C
Single Pulse
1s
DC
10
100
1000
0.01
0.1
1
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
V
DS
, Drain-to-Source Voltage (V)
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
V
DS
90%
V
G
Q
G
4.5V
Q
GS
Q
GD
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Charge
Q
Fig 11. Switching Time Waveform
8/21/2004 Rev.2.01
Fig 12. Gate Charge Waveform
www.SiliconStandard.com
4 of 5
SSM9977M/GM
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
8/21/2004 Rev.2.01
www.SiliconStandard.com
5 of 5
