Advanced Power MOSFET
FEATURES
Avalanche Rugged Technology
Rugged Gate Oxide Technology
Lower Input Capacitance
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 25
µA
(Max.) @ V
DS
= 800V
Low R
DS(ON)
: 3.800
Ω
(Typ.)
1
2
3
SSP3N80A
BV
DSS
= 800 V
R
DS(on)
= 4.8
Ω
I
D
= 3 A
TO-220
1.Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GS
E
AS
I
AR
E
AR
dv/dt
P
D
T
J
, T
STG
T
L
Characteristic
Drain-to-Source Voltage
Continuous Drain Current (T
C
=25
C
)
Continuous Drain Current (T
C
=100
C
)
Drain Current-Pulsed
Gate-to-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Total Power Dissipation (T
C
=25
C
)
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Maximum Lead Temp. for Soldering
Purposes, 1/8“ from case for 5-seconds
Ο
Ο
Ο
Value
800
3
1.9
1
O
2
O
1
O
1
O
3
O
Units
V
A
A
V
mJ
A
mJ
V/ns
W
W/
C
Ο
12
+ 30
_
240
3
10
2.0
100
0.8
- 55 to +150
Ο
C
300
Thermal Resistance
Symbol
R
θ
JC
R
θ
CS
R
θ
JA
Characteristic
Junction-to-Case
Case-to-Sink
Junction-to-Ambient
Typ.
--
0.5
--
Max.
1.25
--
62.5
Ο
Units
C
/W
Rev. B
©1999 Fairchild Semiconductor Corporation
SSP3N80A
Ο
N-CHANNEL
POWER MOSFET
Electrical Characteristics
(T
C
=25
C
unless otherwise specified)
Symbol
BV
DSS
∆BV/∆T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Characteristic
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.
Gate Threshold Voltage
Gate-Source Leakage , Forward
Gate-Source Leakage , Reverse
Drain-to-Source Leakage Current
Static Drain-Source
On-State Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain(“Miller”) Charge
Min. Typ. Max. Units
800
--
2.0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
1.01
--
--
--
--
--
--
2.17
580
60
23
16
26
46
24
27
5.3
12.2
--
--
3.5
100
-100
25
250
4.8
--
750
75
30
40
60
100
60
35
--
--
nC
ns
pF
µA
Ω
Ω
V
V/
C
V
nA
Ο
Test Condition
V
GS
=0V,I
D
=250µA
I
D
=250µA
V
GS
=30V
V
GS
=-30V
V
DS
=800V
V
DS
=640V,T
C
=125
C
V
GS
=10V,I
D
=0.85A
V
DS
=50V,I
D
=0.85A
4
O
*
4
O
Ο
See Fig 7
V
DS
=5V,I
D
=250µA
V
GS
=0V,V
DS
=25V,f =1MHz
See Fig 5
V
DD
=400V,I
D
=2A,
R
G
=16
Ω
See Fig 13
4
5
OO
V
DS
=640V,V
GS
=10V,
I
D
=2A
See Fig 6 & Fig 12
4
5
OO
Source-Drain Diode Ratings and Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
Characteristic
Continuous Source Current
Pulsed-Source Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
1
O
4
O
Min. Typ. Max. Units
--
--
--
--
--
--
--
--
330
1.52
3
12
1.4
--
--
A
V
ns
µC
Test Condition
Integral reverse pn-diode
in the MOSFET
T
J
=25
C
,I
S
=3A,V
GS
=0V
T
J
=25
C
,I
F
=3A
di
F
/dt=100A/µs
4
O
Ο
Ο
Notes ;
1
O
Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
2
O
L=50mH, I
AS
=3A, V
DD
=50V, R
G
=27
Ω
, Starting T
J
=25
C
<
<
_
3
O
I
SD
_
3A, di/dt
_
100A/
µs,
V
DD
<
BV
DSS
, Starting T
J
=25
C
Pulse Test : Pulse Width = 250
µs,
Duty Cycle
<
2%
_
4
O
5
O
Essentially Independent of Operating Temperature
Ο
Ο
N-CHANNEL
POWER MOSFET
Fig 1. Output Characteristics
1
10
SSP3N80A
Fig 2. Transfer Characteristics
[A]
I
D
, Drain Current
1
10
V
GS
Top :
15V
10V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
I
D
, Drain Current
[A]
0
10
0
10
150
o
C
10
-1
25
o
C
@ Notes :
1. V = 0 V
GS
2. V = 50 V
DS
3. 250
µ
s Pulse Test
6
8
10
10
-2
10
-1
@ Notes :
1. 250
µ
s Pulse Test
2. T = 25
o
C
C
10
0
10
1
- 55
o
C
10
-1
2
4
V
DS
, Drain-Source Voltage [V]
[A]
V
GS
, Gate-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
R
DS(on)
, [ ]
Ω
Drain-Source On-Resistance
2
0
Fig 4. Source-Drain Diode Forward Voltage
1
1
0
1
5
V = 10 V
GS
I
DR
, Reverse Drain Current
1
0
0
1
0
1
-1
0
@Nts:
oe
1 V
GS
= 0 V
.
1 0
o
C
5
2
o
C
5
1
-2
0
02
.
2 25
µ
s P l e T s
. 0
us et
5
V
GS
= 20 V
@ N t : T
J
= 2
o
C
oe
5
0
0
3
6
9
1
2
04
.
06
.
08
.
10
.
12
.
I
D
, Drain Current [A]
V
SD
, Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
1000
C = C + C ( C
ds
= shorted )
iss gs gd
Fig 6. Gate Charge vs. Gate-Source Voltage
[V]
V
DS
= 160 V
V
DS
= 400 V
V = 640 V
DS
[pF]
C =C +C
oss ds gd
800
C
iss
600
C =C
rss gd
10
V
GS
, Gate-Source Voltage
Capacitance
400
C
oss
200
C
rss
0
0
10
@ Notes :
1. V = 0 V
GS
2. f = 1 MHz
5
@ Notes : I = 3.0 A
D
0
0
5
10
15
20
25
30
1
10
V
DS
, Drain-Source Voltage [V]
Q
G
, Total Gate Charge [nC]
SSP3N80A
BV
DSS
, (Normalized)
Drain-Source Breakdown Voltage
R
DS(on)
, (Normalized)
Drain-Source On-Resistance
1.2
N-CHANNEL
POWER MOSFET
Fig 8. On-Resistance vs. Temperature
Fig 7. Breakdown Voltage vs. Temperature
3.0
2.5
1.1
2.0
1.0
1.5
1.0
@ Notes :
1. V = 10 V
GS
2. I = 1.5 A
D
0.0
-75
0.9
@ Notes :
1. V = 0 V
GS
2. I = 250
µ
A
D
0.5
0.8
-75
-50
-25
0
25
50
75
100
o
125
150
175
-50
-25
0
25
50
75
100
o
125
150
175
T
J
, Junction Temperature [ C]
T
J
, Junction Temperature [ C]
2
10
Fig 9. Max. Safe Operating Area
Operation in This Area
is Limited by R
DS(on)
Fig 10. Max. Drain Current vs. Case Temperature
4
[A]
I
D
, Drain Current
10
µ
s
3
I
D
, Drain Current
[A]
1
10
100
µ
s
1 ms
0
10
10 ms
DC
2
-1
10
@ Notes :
1. T = 25
o
C
C
2. T = 150
o
C
J
3. Single Pulse
1
-2
10
1
10
10
2
10
3
0
25
50
75
100
o
125
150
V
DS
, Drain-Source Voltage [V]
T
c
, Case Temperature [ C]
Fig 11. Thermal Response
Thermal Response
10
0
D=0.5
@ Notes :
1. Z
θ
J C
(t)=1.25
o
C/W Max.
2. Duty Factor, D=t /t
2
1
3. T
J M
-T
C
=P
D M
*Z
θ
J C
(t)
0.2
0.1
10
- 1
0.05
0.02
0.01
Z
JC
(t) ,
P
DM
single pulse
t
1
t
2
10
- 2
10
- 5
θ
10
- 4
10
- 3
10
- 2
10
- 1
10
0
10
1
t
1
, Square Wave Pulse Duration
[sec]
N-CHANNEL
POWER MOSFET
Fig 12. Gate Charge Test Circuit & Waveform
SSP3N80A
* Current Regulator *
50K¥Ø
12V
200nF
300nF
Same Type
as DUT
V
GS
Q
g
10V
V
DS
V
GS
DUT
3mA
Q
gs
Q
gd
R
1
Current Sampling (I
G
)
Resistor
R
2
Current Sampling (I
D
)
Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
R
L
V
out
V
in
R
G
DUT
10V
V
in
10%
V
out
V
DD
( 0.5 rated V
DS
)
90%
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
L
L
V
DS
Vary t
p
to obtain
required peak I
D
BV
DSS
1
2
--------------------
E
AS
= ---- L
L
I
AS
2
BV
DSS
-- V
DD
BV
DSS
I
AS
C
V
DD
V
DD
t
p
I
D
R
G
DUT
10V
t
p
I
D
(t)
V
DS
(t)
Time
stm32/stm8
