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STA516B

8 A 4 CHANNEL, HALF BRIDGE BASED PRPHL DRVR, PDSO36
8 A 4 通道, 半桥PRPHL驱动, PDSO36

器件类别:模拟混合信号IC    驱动程序和接口   

厂商名称:ST(意法半导体)

厂商官网:http://www.st.com/

器件标准:

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器件参数
参数名称
属性值
Brand Name
STMicroelectronics
是否Rohs认证
符合
厂商名称
ST(意法半导体)
零件包装代码
SOIC
包装说明
HSSOP,
针数
36
Reach Compliance Code
compli
ECCN代码
EAR99
内置保护
TRANSIENT; THERMAL; UNDER VOLTAGE
接口集成电路类型
HALF BRIDGE BASED PERIPHERAL DRIVER
JESD-30 代码
R-PDSO-G36
长度
15.9 mm
功能数量
4
端子数量
36
最高工作温度
70 °C
最低工作温度
输出电流流向
SOURCE AND SINK
标称输出峰值电流
8 A
封装主体材料
PLASTIC/EPOXY
封装代码
HSSOP
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, HEAT SINK/SLUG, SHRINK PITCH
峰值回流温度(摄氏度)
NOT SPECIFIED
认证状态
Not Qualified
座面最大高度
3.43 mm
最大供电电压
52 V
最小供电电压
10 V
标称供电电压
50 V
表面贴装
YES
技术
BCD
温度等级
COMMERCIAL
端子形式
GULL WING
端子节距
0.65 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
断开时间
100 µs
接通时间
100 µs
宽度
11 mm
文档预览
STA516B
65 V, 7.5 A quad power half bridge
Datasheet
-
production data
Description
STA516B is a monolithic quad half-bridge stage in
multipower BCD technology. The device can be
used as dual bridge or reconfigured, by
connecting pin CONFIG to pins VDD, as a single
bridge with double-current capability or as a half
bridge (binary mode) with half current capability.
The device is designed, particularly, to be the
output stage of a stereo all digital high efficiency
amplifier. It is capable of delivering 200 W +
200 W into 6
loads with THD = 10% at
V
CC
= 51 V or, in single BTL configuration, 400 W
into a 3
load
with THD = 10% at V
CC
= 52 V.
The input pins have a threshold proportional to
the voltage on pin VL.
The STA516B is aimed at audio amplifiers in hi-fi
applications, such as home theatre systems,
active speakers and docking stations.
It comes in a 36 pin PowerSO package with
exposed pad up (EPU).
PowerSO36 package
with exposed pad up
Features
Low input/output pulse width distortion
200 m R
dsON
complementary DMOS output
stage
CMOS compatible logic inputs
Thermal protection
Thermal warning output
Undervoltage protection
Table 1. Device summary
Order code
STA516B13TR
Temperature range
0 to 90 °C
Package
PowerSO36 EPU
Packaging
Tape and reel
February 2014
This is information on a product in full production.
DocID13183 Rev 6
1/18
www.st.com
Introduction
STA516B
1
Introduction
Figure 1. Application circuit (dual BTL)
V
CC
1A
IN1A
IN1A
+3.3V
V
L
CONFIG
PWRDN
R57
10K
R59
10K
C58
100nF
TH_WAR
IN1B
V
DD
V
DD
V
SS
V
SS
C58
100nF
C53
100nF
C60
100nF
IN2A
V
CC
SIGN
V
CC
SIGN
IN2A
GND-Reg
GND-Clean
21
22
33
34
M17
35
8
9
36
31
20
19
M16
M15
REGULATORS
7
V
CC
2A
C32
1 F
OUT2A
OUT2A
6
GND2A
C109
330pF
PWRDN
FAULT
23
24
25
27
26
TRI-STATE
PROTECTIONS
&
LOGIC
M5
28
30
M4
13
M2
29
M3
15
17
16
C30
1 F
OUT1A
OUT1A
14
GND1A
C52
330pF
+V
CC
C55
1000 F
L18 22 H
C20
100nF
R98
6
C99
100nF
C23
470nF
C101
100nF
8
12
V
CC
1B
C31
1 F
OUT1B
OUT1B
GND1B
R63
20
R100
6
C21
100nF
L19 22 H
11
10
TH_WAR
IN1B
L113 22 H
C110
100nF
R103
6
C107
100nF
C108
470nF
C106
100nF
8
4
V
CC
2B
C33
1 F
OUT2B
OUT2B
R104
20
R102
6
C111
100nF
3
2
IN2B
IN2B
GNDSUB
32
M14
L112 22 H
1
5
GND2B
D00AU1148B
2/18
DocID13183 Rev 6
STA516B
Pin description
2
Pin description
Figure 2. Pin out
VCC_SIGN
VCC_SIGN
VSS
VSS
IN2B
IN2A
IN1B
IN1A
TH_WARN
FAULT
TRISTATE
PWRDN
CONFIG
36
35
34
33
32
31
30
29
28
27
26
25
24
23
1
2
3
4
5
6
7
SUB_GND
OUT2B
OUT2B
VCC2B
GND2B
GND2A
VCC2A
OUT2A
OUT2A
OUT1B
STA516B
8
9
10
11
12
13
14
OUT1B
VCC1B
GND1B
GND1A
VCC1A
OUT1A
OUT1A
N.C.
VL
VDD
VDD
GND_REG
GND_CLEAN
22
21
20
19
15
16
17
18
Table 2. Pin function
Pin
1
2, 3
4
5
6
7
8, 9
10, 11
12
13
14
15
16, 17
18
19
20
21, 22
23
Name
GND_SUB
OUT2B
VCC2B
GND2B
GND2A
VCC2A
OUT2A
OUT1B
VCC1B
GND1B
GND1A
VCC1A
OUT1A
N.C.
GND_CLEAN
GND_REG
VDD
VL
Type
PWR
O
PWR
PWR
PWR
PWR
O
O
PWR
PWR
PWR
PWR
O
-
PWR
PWR
PWR
PWR
Substrate ground
Output half bridge 2B
Positive supply
Negative supply
Negative supply
Positive supply
Output half bridge 2A
Output half bridge 1B
Positive supply
Negative supply
Negative supply
Positive supply
Output half bridge 1A
No internal connection
Logical ground
Ground for regulator V
DD
5-V regulator referred to ground
High logical state setting voltage, V
L
3/18
18
Description
DocID13183 Rev 6
Pin description
Table 2. Pin function (continued)
Pin
Name
Type
Description
STA516B
24
CONFIG
I
Configuration pin:
0: normal operation
1: bridges in parallel (OUT1A = OUT1B, OUT2A = OUT2B (If
IN1A = IN1B, IN2A = IN2B))
Standby pin:
0: low-power mode
1: normal operation
Hi-Z pin:
0: all power amplifier outputs in high impedance state
1: normal operation
Fault pin advisor (open-drain device, needs pull-up resistor):
0: fault detected (short circuit or thermal, for example)
1: normal operation
Thermal warning advisor (open-drain device, needs pull-up
resistor):
0: temperature of the IC >130 °C
1: normal operation
Input of half bridge 1A
Input of half bridge 1B
Input of half bridge 2A
Input of half bridge 2B
5-V regulator referred to +V
CC
Signal positive supply
25
PWRDN
I
26
TRISTATE
I
27
FAULT
O
28
TH_WARN
O
29
30
31
32
33, 34
35, 36
IN1A
IN1B
IN2A
IN2B
VSS
VCC_SIGN
I
I
I
I
PWR
PWR
4/18
DocID13183 Rev 6
STA516B
Electrical characteristics
3
Electrical characteristics
Table 3. Absolute maximum ratings
Symbol
Parameter
65
5.5
0 to 150
-40 to 150
Value
Unit
V
V
°C
°C
V
CC_MAX
DC supply voltage (pins 4, 7, 12, 15)
V
max
T
j_MAX
T
stg
Maximum voltage on pins 23 to 32
Operating junction temperature
Storage temperature
Warning:
Stresses beyond those listed under “Absolute maximum
ratings” make cause permanent damage to the device. These
are stress ratings only, and functional operation of the device
at these or any other conditions beyond those indicated
under “Recommended operating condition” are not implied.
Exposure to absolute-maximum-rated conditions for
extended periods may affect device reliability. In the real
application, power supply with nominal value rated inside
recommended operating conditions, may experience some
rising beyond the maximum operating condition for short
time when no or very low current is sinked (amplifier in mute
state). In this case the reliability of the device is guaranteed,
provided that the absolute maximum rating is not exceeded.
Table 4. Thermal data
Symbol
T
j-case
T
warn
T
jSD
t
hSD
Parameter
Thermal resistance junction to case (thermal pad)
Thermal warning temperature
Thermal shut-down junction temperature
Thermal shut-down hysteresis
-
-
-
-
Min.
1
130
150
25
Typ.
Max.
2.5
-
-
-
Unit
°C/W
°C
°C
°C
Table 5. Recommended operating conditions
Symbol
V
CC
T
amb
Parameter
Supply voltage for pins PVCCA, PVCCB
Ambient operating temperature
Min.
10
0
-
-
Typ.
Max.
58
90
Unit
V
°C
DocID13183 Rev 6
5/18
18
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