STB5610
GPS RF FRONT-END IC
PRELIMINARY DATA
•
ONE CHIP SYSTEM TO INTERFACE GPS
ANTENNA TO GPS MICRO CONTROLLER
•
ABLE TO SUPPORT ACTIVE AND PASSIVE
ANTENNA
•
MINIMUM EXTERNAL COMPONENTS
•
COMPATIBLE WITH GPS L1 SPS SIGNAL AND
GALILEO FREQUENCIES
•
CMOS OUTPUT LEVELS
•
2.7 V .. 3.6 V SUPPLY VOLTAGE
•
EMBEDDED LOW PHASE NOISE PLL
•
ACTIVE ANTENNA SENSOR
•
SMART CHIP ENABLE FUNCTION FOR POWER
CONSUMPTION OPTIMIZATION
•
ESD PROTECTED
DESCRIPTION
The STB5610, using ST Microelectronics RF Bipolar
technology, implements a Global Positioning System
RF front-end. The chip provides down conversion
from the 1575.42 MHz GPS (L1) signal to 4.092 MHz
Output signal. The integrated PLL with on-chip
reference oscillator uses a low cost 16.368 MHz
crystal. No TCXO is required.
PIN CONNECTION
Gnd_XT AL
TQFP48
ORDER CODE
STB5610
BRANDING
STB5610
XTAL_out
Gnd_XTAL
XTAL_in
Gnd_IF
Gnd_IF
Vcc_IF
IF2+
Fselect
IF2-
48
Vcc_XTAL
Vcc_Logic
LF
Vcc_VCO
Gnd
TNK1
TNK2
Gnd
Gnd
IF1+
IF1-
Gnd
1
2
3
4
5
6
7
8
9
10
11
12
13
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
Vcc_Logic2
Gnd
DATA
CLK
Gnd_Driver
Vcc_Driver
Gnd_Loic
Vcc_Logic
AS1
AS2
As_out
GC
14
RF+
15
16
17
Vcc_RF
18
19
LNA_out-
20
Vcc_LNA
21
Gnd
22
23
LNA_in-
May, 7 2002
CE2
24
Gnd
CE
Gnd_RF
LNA_in+
LNA_out+
Gnd_RF
RF-
1/11
STB5610
PIN CONFIGURATION
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Symbol
Vcc_XTAL
Vcc_Logic
LF
Vcc_VCO
Gnd
TNK1
TNK2
Gnd
Gnd
IF1+
IF1-
Gnd
Gnd_RF
RF+
RF-
Gnd_RF
Vcc_ RF
LNA_Out+
LNA_Out-
Vcc_LNA
Gnd_LNA
LNA_in+
LNA_in-
Gnd_LNA
Typ. DC Bias
Description
Power supply
Power supply
Loop filter
Power supply
Ground
Tank Input
Tank Input
Ground
Ground
Mixer Output
Mixer Output
Ground
Ground
RF amp. input
RF amp. input
Ground
Power supply
LNA output
LNA output
Power supply
Ground
LNA input
LNA input
Ground
External Circuit
2/11
STB5610
PIN CONFIGURATION
PIN
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Symbol
GC
AS_Out
AS2
AS1
Vcc_Logic
Gnd_Logic
Vcc_Driver
Gnd_Driver
CLK
DATA
Gnd
Vcc_Logic2
CE2
CE
Fselect
Gnd_IF
IF2-
IF2+
Gnd_IF
Vcc_IF
Gnd_XTAL
XTAL_in
XTAL_out
Gnd_XTAL
Typ. DC Bias
Description
LNA Gain control
Antenna sensor output
Antenna sensor input
Vcc Antenna Supply
Power supply
Ground
Supply Voltage
Ground
Clock
Data
Ground
Supply Voltage
Chip Enable (no data)
Chip Enable
Frequency Selector
Ground
Lim. Amp. Output
Lim. Amp. Output
Ground
Supply Voltage
Ground
Crystal Input
Crystal Output
Ground
External Circuit
3/11
STB5610
BLOCK DIAGRAM (GPS L1)
SAW Filter
Passive
Antenna
LC Filter
LC Filter
Two gain
LNA
1.57 GHz
RF Amp.
Mixer
1
ST
Lim. amp.
2
ND
Lim. amp.
D Latch Output buffer
D
CK
Q
4 MHz
Data @ 4 MHz
CMOS levels
Gain
Select.
1.55 GHz
20 MHz
20 MHz
PLL
16.368 MHz
Quartz
~
VCO
CLK @ 16MHz
CMOS levels
16 MHz
Loop Freq.
Filter select
CE
ExternalTank
ASout
CE2
FUNCTIONAL DESCRIPTION
LNA section
The RF input signal is amplified by two gain levels
LNA. Using gain control pin the LNA gain is set to
19 dB to support passive antenna or 10 dB to sup-
port active antenna. The LNA output signal is fil-
tered by 1575.42 MHz SAW filter.
RF Amplifier plus mixer section
The 1575.42 MHz input signal, amplified by RF
amp., is mixed with the VCO signal to generate a
differential 20.46MHz IF signal
IF section
Two LC filters at mixer output and at first limiting
output are used to suppress undesirable signals
and mixer products. The second stage limiting
amplifier is connected to a D-Type latch clocked
by 16.368MHz crystal oscillator signal. The effect
of sampling the 20.46MHz signal at 16.368MHz is
to create sub-sampling alias at 4.092MHz. This is
fed to the output level converter.
Output section
The output buffers perform level translation from
the internal ECL levels to CMOS output levels re-
ferred to ground. The Data signal changes during
the clock signal negative edge.
Power supplies
The STB5610, has been designed to support
from 2.7 V to 3.6 V supply voltage.
VCO and PLL
Using external tank the VCO is able to provide
very low phase noise signal. Through the freq. se-
lector pin the VCO signal is set at 1554.96 MHz
and at 1571.328 MHz. The on-chip reference os-
cillator uses a low cost 16.368 MHz crystal.
Antenna sensor circuitry
Integrated sensor circuitry is able to evaluate the
antenna current consumption; the Asout pin out-
put provides this info externally. Using external
sensing resistor of 10 Ohm if the antenna current
consumption is inside the range 10mA…40mA
(active antennas typical current consumption) the
Asout output logic level is High, if the antenna cur-
rent consumption is outside the above reported
range (passive antenna or problem on antenna
connection) the Asout output logic level is low.
Chip enable
Using the CE pin it is possible to switch off all the
chip ( neither data nor clock available).
Using CE2 pin it is possible to disable the analog
portion of the chip (no data available) maintaining
the digital portion active (Clock available) optimiz-
ing the chip current consumption.
4/11
STB5610
ABSOLUTE MAXIMUM RATING
Symbol
Vcc
Tj
Supply voltage
Junction operating temperature
Parameter
Value
5.9
-40 to 125
Unit
V
o
C
THERMAL DATA
Symbol
Rthj-case
Parameter
Thermal resistance junction-case
Value
TBD
Unit
o
C/W
ELECTRICAL CHARACTERISTICS (Vcc = 3+/-10%, Tcase= 25
o
C)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
SUPPLY
Vcc
Icc
AS1
Supply voltage
Supply current
Vcc Antenna
Supply
2.7
2.7
3.3
37
3.3 / 5
5.5
3.6
V
mA
V
LNA
Gp
NF
IIP3
VSWRin
Power gain
Noise figure
Input IP3
Voltage Stat. Wave
Ratio
Pin GC at GND
Pin GC at Vcc
Pin GC at GND
Pin GC at Vcc
Pin GC at GND
Pin GC at Vcc
Z
L
=50Ω
19
10
3
10
-20
-5
2.1
dB
dB
dBm
RF AMPLIFIER AND MIXER CHAIN
IIP3
NF
Z
IN
Z
OUT
fRF
G
Input IP3
Noise Figure
Input impedance
Differential output
impedance
Input signal RF
Voltage Convertion
Gain
-19
5.5
50
1.4
1.575
30
dBm
dB
Ω
ΚΩ
MHz
dB
FIRST LIMITING AMPLIFIER
G
Z
OUT
Voltage Gain
Differential output
impedance
60
2.4
dB
ΚΩ
5/11
