STD1NK60 - STD1NK60-1
STQ1HNK60R - STN1HNK60
N-CHANNEL 600V - 8Ω - 1A DPAK/TO-92/IPAK/SOT-223
SuperMESH™ MOSFET
Table 1: General Features
TYPE
STD1NK60
STD1NK60-1
STQ1HNK60R
STN1HNK60
■
■
■
■
■
■
Figure 1: Package
I
D
1A
1A
0.4 A
0.4 A
Pw
30 W
30 W
3W
3.3 W
Ω
Ω
Ω
Ω
V
DSS
600
600
600
600
V
V
V
V
R
DS(on)
<
<
<
<
8.5
8.5
8.5
8.5
3
1
TYPICAL R
DS
(on) = 8
Ω
EXTREMELY HIGH dv/dt CAPABILITY
ESD IMPROVED CAPABILITY
100% AVALANCHE TESTED
NEW HIGH VOLTAGE BENCHMARK
GATE CHARGE MINIMIZED
TO-92 (Ammopack)
DPAK
2
3
2
1
1
2
3
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt capability
for the most demanding applications. Such series
complements ST full range of high voltage MOS-
FETs including revolutionary MDmesh™ products.
SOT-223
IPAK
Figure 2: Internal Schematic Diagram
APPLICATIONS
■
LOW POWER BATTERY CHARGERS
■
SWITH MODE LOW POWER
SUPPLIES(SMPS)
■
LOW POWER, BALLAST, CFL (COMPACT
FLUORESCENT LAMPS)
Table 2: Order Codes
Part Number
STD1NK60T4
STD1NK60-1
STQ1HNK60R
STQ1HNK60R-AP
STN1HNK60
Marking
D1NK60
D1NK60
1HNK60R
1HNK60R
N1HNK60
Package
DPAK
IPAK
TO-92
TO-92
SOT-223
Packaging
TAPE & REEL
TUBE
BULK
AMMOPAK
TAPE & REEL
Rev. 3
February 2006
1/15
STD1NK60 - STD1NK60-1 - STQ1HNK60R - STN1HNK60
Table 3: Absolute Maximum ratings
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
( )
P
TOT
dv/dt (1)
T
j
T
stg
Parameter
DPAK / IPAK
Value
TO-92
SOT-223
Unit
V
V
V
0.4
0.25
1.6
3.3
0.025
A
A
A
W
W/°C
V/ns
°C
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 kΩ)
Gate- source Voltage
Drain Current (continuous) at T
C
= 25°C
Drain Current (continuous) at T
C
= 100°C
Drain Current (pulsed)
Total Dissipation at T
C
= 25°C
Derating Factor
Peak Diode Recovery voltage slope
Operating Junction Temperature
Storage Temperature
1.0
0.63
4
30
0.24
600
600
± 30
0.4
0.25
1.6
3
0.025
3
-55 to 150
( ) Pulse width limited by safe operating area
(1) I
SD
≤1.0A,
di/dt
≤100A/µs,
V
DD
≤
V
(BR)DSS
, T
j
≤
T
JMAX.
Table 4: Thermal Data
DPAK/IPAK
Rthj-case
Rthj-amb
Rthj-lead
T
l
Thermal Resistance Junction-case Max
Thermal Resistance Junction-ambient Max
Thermal Resistance Junction-lead Max
Maximum Lead Temperature For Soldering
Purpose
4.16
100
--
275
TO-92
--
120
40
260
SOT-223
--
37.87 (#)
--
Unit
°C/W
°C/W
°C/W
°C
(#) When mounted on FR-4 board of 1 in
2
, 2oz Cu, t < 10 sec
Table 5: Avalanche Characteristics
Symbol
I
AR
E
AS
Parameter
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
Single Pulse Avalanche Energy
(starting T
j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Max Value
1
25
Unit
A
mJ
ELECTRICAL CHARACTERISTICS
(T
CASE
=25°C UNLESS OTHERWISE SPECIFIED)
Table 6: On/Off
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Parameter
Drain-source
Breakdown Voltage
Zero Gate Voltage
Drain Current (V
GS
= 0)
Gate-body Leakage
Current (V
DS
= 0)
Gate Threshold Voltage
Static Drain-source On
Resistance
Test Conditions
I
D
= 1mA, V
GS
= 0
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125 °C
V
GS
= ± 30V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10V, I
D
= 0.5 A
2.25
3
8
Min.
600
1
50
±100
3.7
8.5
Typ.
Max.
Unit
V
µA
µA
nA
V
Ω
2/15
STD1NK60 - STD1NK60-1 - STQ1HNK60R - STN1HNK60
ELECTRICAL CHARACTERISTICS (CONTINUED)
Table 7: Dynamic
Symbol
g
fs
(1)
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
r
Q
g
Q
gs
Q
gd
Parameter
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Test Conditions
V
DS
= 15 V
,
I
D
= 0.5 A
V
DS
= 25V, f = 1 MHz, V
GS
= 0
Min.
Typ.
1
156
23.5
3.8
6.5
5
19
25
7
1.1
3.7
10
Max.
Unit
S
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
DD
= 300 V, I
D
= 0.5 A,
R
G
= 4.7
Ω,
V
GS
= 10 V
(Resistive Load see, Figure
21)
V
DD
= 480V, I
D
= 1 A,
V
GS
= 10V, R
G
= 4.7
Ω
(see, Figure 23)
Table 8: Source Drain Diode
Symbol
I
SD
I
SDM
(2)
V
SD
(1)
t
rr
Q
rr
I
RRM
t
rr
Q
rr
I
RRM
Parameter
Source-drain Current
Source-drain Current (pulsed)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 1.0 A, V
GS
= 0
I
SD
= 1.0 A, di/dt = 100 A/µs
V
DD
= 25V, T
j
= 25°C
(see test circuit, Figure 22)
I
SD
= 1.0 A, di/dt = 100 A/µs
V
DD
= 25V, T
j
= 150°C
(see test circuit, Figure 22)
140
240
3.3
229
377
3.3
Test Conditions
Min.
Typ.
Max.
1
4
1.6
Unit
A
A
V
ns
µC
A
ns
µC
A
(1) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
(2) Pulse width limited by safe operating area.
3/15
STD1NK60 - STD1NK60-1 - STQ1HNK60R - STN1HNK60
Figure 3:
.
Safe Operating Area For SOT-223
Figure 6: Thermal Impedance For SOT-223
Figure 4: Safe Operating Area For DPAK/IPAK
Figure 7: Thermal Impedance For DPAK/IPAK
Figure 5: Safe Operating Area For TO-92
Figure 8: Thermal Impedance For TO-92
4/15
STD1NK60 - STD1NK60-1 - STQ1HNK60R - STN1HNK60
Figure 9: Output Characteristics
Figure 12: Transfer Characteristics
Figure 10: Transconductance
Figure 13: Gate Charge vs Gate-source Voltage
Figure 11: Capacitance Variations
Figure 14: Static Drain-source On Resistance
5/15
嵌入式系统
