STL190N4F7AG
Automotive-grade N-channel 40 V, 1.68 mΩ typ., 120 A
STripFET™ F7 Power MOSFET in a PowerFLAT™ 5x6 package
Datasheet - production data
Features
Order code
STL190N4F7AG
V
DS
40 V
R
DS(on)
max
2.00 mΩ
I
D
120 A
Designed for automotive applications and
AEC-Q101 qualified
Among the lowest R
DS(on)
on the market
Excellent FoM (figure of merit)
Low C
rss
/C
iss
ratio for EMI immunity
High avalanche ruggedness
Wettable flank package
Applications
Figure 1: Internal schematic diagram
Switching applications
Description
This N-channel Power MOSFET utilizes
STripFET™ F7 technology with an enhanced
trench gate structure that results in very low on-
state resistance, while also reducing internal
capacitance and gate charge for faster and more
efficient switching.
Table 1: Device summary
Order code
STL190N4F7AG
Marking
190N4F7
Package
PowerFLAT™ 5x6
Packaging
Tape and reel
June 2016
DocID028792 Rev 2
1/14
www.st.com
This is information on a product in full production.
Contents
STL190N4F7AG
Contents
1
2
3
4
Electrical ratings ............................................................................. 3
Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 5
Test circuits ..................................................................................... 7
Package mechanical data ............................................................... 8
4.1
4.2
PowerFLAT™ 5x6 WF type C package information .......................... 8
PowerFLAT™ 5x6 packing information ........................................... 11
5
Revision history ............................................................................ 13
2/14
DocID028792 Rev 2
STL190N4F7AG
Electrical ratings
1
Electrical ratings
Table 2: Absolute maximum ratings
Symbol
V
DS
V
GS
I
D
(1)
I
D
(1)
I
DM
(1)(2)
P
TOT
I
AV
E
AS
T
j
T
stg
Notes:
(1)
Drain
(2)
Pulse
Parameter
Drain-source voltage
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Avalanche current, repetitive or not repetitive (pulse width limited by
maximum junction temperature)
Single pulse avalanche energy (T
J
= 25 °C, I
D
= 17.5 A, V
DD
= 22 V)
Operating junction temperature range
Storage temperature range
Value
40
±20
120
120
480
127
35
300
-55 to 175
Unit
V
V
A
A
A
W
A
mJ
°C
current is limited by package, the current capability of the silicon is 183 A at 25 °C.
width limited by safe operating area
Table 3: Thermal data
Symbol
R
thj-pcb
(1)
R
thj-case
Notes:
(1)
Parameter
Thermal resistance junction-pcb
Thermal resistance junction-case
Value
31.3
1.18
Unit
°C/W
°C/W
When mounted on FR-4 board of 1 inch², 2oz Cu, t < 10 s.
DocID028792 Rev 2
3/14
Electrical characteristics
STL190N4F7AG
2
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 4: On /off states
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Parameter
Drain-source breakdown voltage
Zero gate voltagedrain current
Gate-body leakage current
Gate threshold voltage
Static drain-source on-resistance
Test conditions
V
GS
= 0 V, I
D
= 250 μA
V
GS
= 0 V
V
DS
= 40 V
V
GS
= 20 V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= 10 V, I
D
= 17.5 A
2
1.68
Min.
40
1
100
4
2.00
Typ.
Max.
Unit
V
µA
nA
V
mΩ
Table 5: Dynamic
Symbol
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
V
DD
= 20 V, I
D
= 35 A,
V
GS
= 10 V
(see
Figure 14: "Test
circuit for gate charge
behavior")
V
DS
= 25 V, f = 1 MHz,
V
GS
= 0 V
Test conditions
Min.
-
-
-
-
-
-
Typ.
3000
850
70
41
15
7
Max.
-
-
-
-
-
-
Unit
pF
pF
pF
nC
nC
nC
Table 6: Switching times
Symbol
t
d(on)
t
r
t
d(off)
t
f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
V
DD
= 20 V, I
D
= 17.5 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see
Figure 13: "Test circuit
for resistive load switching
times"and Figure 18:
"Switching time waveform")
Min.
-
-
-
-
Typ.
19
6.4
25
6.5
Max.
-
-
-
-
Unit
ns
ns
ns
ns
Table 7: Source-drain diode
Symbol
V
SD
(1)
t
rr
Q
rr
I
RRM
Parameter
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Test conditions
I
SD
= 35 A, V
GS
= 0 V
I
D
= 35 A, di/dt = 100 A/µs
V
DD
= 32 V
(see
Figure 15: "Test circuit
for inductive load switching
and diode recovery times")
Min.
-
-
-
-
43
43
2
Typ.
Max.
1.2
Unit
V
ns
nC
A
Notes:
(1)
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
4/14
DocID028792 Rev 2
STL190N4F7AG
Electrical characteristics
2.1
Electrical characteristics (curves)
Figure 2: Safe operating area
Figure 3: Thermal impedance
Figure 4: Output characteristics
Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage
Figure 7: Static drain-source on-resistance
DocID028792 Rev 2
5/14
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