Features
•
Protocol
– UART used as Physical Layer
– Based on the Intel Hex-type records
– Autobaud
•
In-System Programming
– Read/Write Flash and EEPROM Memories
– Read Device ID
– Full-chip Erase
– Read/Write Configuration Bytes
– Security Setting From ISP Command
– Remote Application Start Command
•
In-Application Programming/Self Programming
– Read/Write Flash and EEPROM Memories
– Read Device ID
– Block Erase
– Read/write Configuration Bytes
– Bootloader Start
CAN
Microcontrollers
Description
This document describes the UART bootloader functionalities as well as the serial
protocol to efficiently perform operations on the on-chip memory. Additional informa-
tion on the T89C51CC02 product can be found in the T89C51CC02 datasheet and the
T89C51CC02 errata sheet available on the Atmel web site, www.atmel.com.
The bootloader software Package (source code and binary) currently used for produc-
tion is available from the Atmel web site.
T89C51CC02
UART
Bootloader
Bootloader Revision
Revisions 1.2.0
Revision 1.2.1
Purpose of Modifications
First release
Standardization of tasks in source
program.
Date
03/12/2002
19/03/2007
4223C–CAN–03/08
Functional
Description
In-System
Programming
Capability
The T89C51CC02 Bootloader facilitates In-System Programming and In-Application
Programming.
In-System Programming (ISP) allows the user to program or reprogram a microcontroller’s on-
chip Flash memory without removing it from the system and without the need of a pre-pro-
grammed application.
The UART bootloader can manage a communication with a host through the serial network. It
can also access and perform requested operations on the on-chip Flash memory.
In-Application
Programming or
Self Programming
Capability
Block Diagram
In-Application Programming (IAP) allows the reprogramming of a microcontroller’s on-chip Flash
memory without removing it from the system and while the embedded application is running.
The UART bootloader contains some Application Programming Interface routines named API
routines allowing IAP by using the user’s firmware.
This section describes the different parts of the bootloader. The figure below shows the on-chip
bootloader and IAP processes.
Figure 1.
Bootloader Process Description
On chip
User
Application
External host via the
UART Protocol
Communication
ISP Communication
Management
IAP
User Call
Management
Flash Memory
Management
Flash
Memory
2
T89C51CC02 UART Bootloader
4223C–CAN–03/08
T89C51CC02 UART Bootloader
ISP Communication
Management
The purpose of this process is to manage the communication and its protocol between the on-
chip bootloader and an external device (host). The on-chip bootloader implements a Serial pro-
tocol (see Section “Protocol”, page 9). This process translates serial communication frames
(UART) into Flash memory accesses (read, write, erase...).
User Call Management
Several Application Program Interface (API) calls are available to the application program to
selectively erase and program Flash pages. All calls are made through a common interface (API
calls) included in the bootloader. The purpose of this process is to translate the application
request into internal Flash Memory operations.
Flash Memory
Management
This process manages low level accesses to the Flash memory (performs read and write
accesses).
Bootloader Configuration
Configuration and
Manufacturer
Information
Mnemonic
BSB
SBV
P1_CF
P3_CF
P4_CF
SSB
EB
Manufacturer
Id1: Family code
Id2: Product Name
Id3: Product Revision
The table below lists Configuration and Manufacturer byte information used by the bootloader.
This information can be accessed through a set of API or ISP commands.
Description
Boot Status Byte
Software Boot Vector
Port 1 Configuration
Port 3 Configuration
Port 4 Configuration
Software Security Byte
Extra Byte
Default Value
FFh
FCh
FEh
FFh
FFh
FFh
FFh
58h
D7h
BBh
FFh
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4223C–CAN–03/08
Mapping and Default
Value of Hardware
Security Byte
Bit Position
7
6
5
4
3
2
1
0
X2B
BLJB
reserved
reserved
reserved
LB2
LB1
LB0
The 4 Most Significant Byte (MSB) of the Hardware Byte can be read/written by software (this
area is called Fuse bits). The 4 (Least Significant Byte) LSB can only be read by software and
written by hardware in parallel mode (with parallel programmer devices).
Default Value
U
P
U
U
U
P
U
U
To lock the chip (see data sheet)
Description
To start in x1 mode
To map the boot area in code area between F800h-FFFFh
Mnemonic
Note:
U: Unprogram = 1
P: Program = 0
Security
The bootloader has Software Security Byte (SSB) to protect itself from user access or ISP
access.
The Software Security Byte (SSB) protects from ISP accesses. The command "Program Soft-
ware Security Bit" can only write a higher priority level. There are three levels of security:
•
level 0:
NO_SECURITY
(FFh)
This is the default level.
From level 0, one can write level 1 or level 2.
level 1:
WRITE_SECURITY
(FEh)
In this level it is impossible to write in the Flash memory, BSB and SBV.
The Bootloader returns an error message.
From level 1, one can write only level 2.
level 2:
RD_WR_SECURITY
(FCh)
Level 2 forbids all read and write accesses to/from the Flash memory.
The Bootloader returns an error message.
Level 0
Level 1
Read only access allowed
Read only access allowed
Read only access allowed
Write level2 allowed
Read only access allowed
Read only access allowed
Not allowed
Allowed
Allowed
Level 2
All access not allowed
All access not allowed
All access not allowed
Read only access allowed
Read only access allowed
Read only access allowed
Not allowed
Allowed
Allowed
•
•
Only a full chip erase command can reset the software security bits.
Flash/EEPROM
Fuse bit
BSB & SBV & EB
SSB
Manufacturer info
Bootloader info
Erase block
Full chip erase
Blank Check
Any access allowed
Any access allowed
Any access allowed
Any access allowed
Read only access allowed
Read only access allowed
Allowed
Allowed
Allowed
4
T89C51CC02 UART Bootloader
4223C–CAN–03/08
T89C51CC02 UART Bootloader
Software Boot
Vector
The Software Boot Vector (SBV) forces the execution of a user bootloader starting at address
[SBV]00h in the application area (FM0).
The way to start this user bootloader is described in the section “Boot Process”.
Figure 2.
Software Boot Vector
UART Bootloader
User Bootloader
Application
[SBV]00h
FM1
FM0
FLIP Software
Program
FLIP is a PC software program running under Windows
®
9x/2K/XP Windows NT
®
and LINUX
®
that supports all Atmel Flash microcontroller and CAN protocol communication media.
This software program is available free of charge from the Atmel web site.
5
4223C–CAN–03/08
