TP2522
P-Channel Enhancement Mode
Vertical DMOS FETs
Features
►
►
►
►
►
►
►
►
Low threshold — -2.4V max.
High input impedance
Low input capacitance — 125pF max.
Fast switching speeds
Low ON-resistance
Free from secondary breakdown
Low input and output leakage
Complementary N and P-channel devices
General Description
This low threshold enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and with the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures,
this device is free from thermal runaway and thermally-
induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching
speeds are desired.
Applications
►
►
►
►
►
►
►
Logic level interfaces – ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
Ordering Information
BV
DSS
/BV
DGS
(V)
R
DS(ON)
max
(Ω)
V
GS(th)
max
(V)
I
D(ON)
min
(A)
Package Options
TO-243AA (SOT-89)
TP2522N8-G
Die*
TP2522ND
-220
12
-2.4
-0.75
-G indicates package is RoHS compliant (‘Green’)
* MIL visual screening available.
Pin Configuration
DRAIN
Absolute Maximum Ratings
Parameter
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
Operating and storage temperature
Soldering temperature*
Value
BV
DSS
BV
DGS
±20V
-55°C to +150°C
300°C
GATE
SOURCE
DRAIN
TO-243AA (SOT-89) (N8)
Product Marking
TP5CW
W = Code for week sealed
Absolute Maximum Ratings are those values beyond which damage to
the device may occur. Functional operation under these conditions is not
implied. Continuous operation of the device at the absolute rating level
may affect device reliability. All voltages are referenced to device ground.
* Distance of 1.6 mm from case for 10 seconds.
TO-243AA (SOT-89) (N8)
TP2522
Thermal Characteristics
Package
TO-243AA (SOT-89)
(continuous)*
(mA)
I
D
(pulsed)
(A)
I
D
Power Dissipation
@ T
A
= 25
O
C
(W)
O
θ
jc
C/W
O
θ
j
a
C/W
I
DR
*
(mA)
I
DRM
(A)
-260
-2.0
1.6
15
78
†
-260
-2.0
* I
D
(continuous) is limited by max rated T
j
.
† Mounted on FR5 board, 25mm x 25mm x 1.57mm.
Electrical Characteristics
(T = 25°C unless otherwise specified)
A
Symbol
BV
DSS
V
GS(th)
∆V
GS(th)
I
GSS
I
DSS
Parameter
Drain-to-source breakdown voltage
Gate threshold voltage
Change in V
GS(th)
with temperature
Gate body leakage
Zero gate voltage drain current
Min
-220
-1.0
-
-
-
-0.25
-0.75
-
-
100
-
-
-
-
-
-
-
-
-
Typ
-
-
-
-
-
-
-0.7
-2.1
10
8.0
-
250
75
20
10
-
-
-
-
-
300
Max
-
-2.4
4.5
-100
-10
-1.0
-
-
15
12
1.7
-
125
85
35
10
15
20
15
-1.8
-
Units
V
V
mV/
O
C
nA
μA
mA
A
Ω
%/
O
C
mmho
pF
Conditions
V
GS
= 0V, I
D
= -2.0mA
V
GS
= V
DS
, I
D
= -1.0mA
V
GS
= V
DS
, I
D
= -1.0mA
V
GS
= ± 20V, V
DS
= 0V
V
GS
= 0V, V
DS
= Max Rating
V
GS
= 0V, V
DS
= 0.8 Max Rating,
T
A
= 125°C
V
GS
= -4.5V, V
DS
= -25V
V
GS
= -10V, V
DS
= -25V
V
GS
= -4.5V, I
D
= -100mA
V
GS
= -10V, I
D
= -200mA
V
GS
= -10V, I
D
= -200mA
V
DS
= -25V, I
D
= -200mA
V
GS
= 0V,
V
DS
= -25V,
f = 1.0 MHz
V
DD
= -25V,
I
D
= -0.75A,
R
GEN
= 25Ω
V
GS
= 0V, I
SD
= -0.5A
V
GS
= 0V, I
SD
= -0.5A
I
D(ON)
R
DS(ON)
∆R
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
rr
ON-state drain current
Static drain-to-source ON-State
resistance
Change in R
DS(ON)
with temperature
Forward transconductance
Input capacitance
Common source output capacitance
Reverse transfer capacitance
Turn-ON delay time
Rise time
Turn-OFF delay time
Fall time
Diode forward voltage drop
Reverse recovery time
ns
V
ns
Notes:
(1) All D.C. parameters 100% tested at 25
O
C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
(2) All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
0V
10%
INPUT
-10V
PULSE
GENERATOR
90%
t
(OFF)
t
r
t
d(OFF)
t
F
INPUT
R
GEN
D.U.T.
Output
R
L
10%
t
(ON)
t
d(ON)
0V
90%
OUTPUT
V
DD
90%
10%
V
DD
2
TP2522
Typical Performance Curves
Output Characteristics
-2.5
-2.0
Saturation Characteristics
V
GS
= -10V
-2.0
-8V
-1.6
I
D
(amperes)
-1.5
I
D
(amperes)
V
GS
= -10V
-1.2
-6V
-1.0
-8V
-6V
-0.8
-0.5
-4V
-3V
-0.4
-4V
-3V
0
-2
-4
-6
-8
-10
0
0
-10
-20
-30
-40
-50
0
V
DS
Transconductance vs. Drain Current
1.0
2.0
V
DS
(volts)
Power Dissipation vs. Ambient Temperature
0.8
V
DS
= -25V
TO-243AA
G
FS
(siemens)
T
A
= -55°C
0.4
P
D
(watts)
0.6
1.0
T
A
= 25°C
T
A
= 125°C
0.2
0
0
-0.4
-0.8
-1.2
-1.6
-2.0
0
0
25
50
75
100
125
150
I
D
(amperes)
Maximum Rated Safe Operating Area
-10
1.0
T
A
(°C)
Thermal Response Characteristics
Thermal Resistance (normalized)
T
A
= 25°C
TO-243AA (pulsed)
I
D
(amperess)
-1.0
0.8
0.6
0.4
-0.1
TO-243AA (DC)
0.2
TO-243AA
T
A
= 25°C
P
D
= 1.6W
-0.01
-1
-10
-100
-1000
0
0.001
0.01
0.1
1
10
V
DS
t
P
(seconds)
3
TP2522
Typical Performance Curves
(cont.)
BV
DSS
Variation with Temperature
50
1.1
40
On-Resistance vs. Drain Current
BV
DSS
(normalized)
V
GS
= -4.5V
R
DS(ON)
(ohms)
30
1.0
20
V
GS
= -10V
10
0.9
0
-50
0
50
100
150
0
-0.5
-1.0
-1.5
-2.0
-2.5
T
j
(°C)
Transfer Characteristics
-2.5
1.2
-2.0
I
D
(amperes)
V
(th)
and R
DS
Variation with Temperature
2.5
V
DS
= -25V
V
GS(th)
(normalized)
2.0
25°C
1.1
-1.5
1.5
1.0
125°C
-1.0
V
(th)
@ -1mA
1.0
0.9
0.5
0.8
-0.5
0
0
-2
-4
-6
-8
-10
-50
0
50
100
150
0
V
GS
(volts)
Capacitance vs. Drain-to-Source Voltage
200
-10
T
j
(°C)
Gate Drive Dynamic Characteristics
f = 1MHz
-8
150
V
DS
= -10V
C (picofarads)
V
GS
(volts)
-6
100
V
DS
= -40V
-4
C
ISS
50
200pF
-2
C
RSS
0
0
-10
-20
-30
C
OSS
0
-40
0
73pF
0.5
1.0
1.5
2.0
2.5
V
DS
(volts)
Q
G
(nanocoulombs)
4
R
DS(ON)
(normalized)
T
A
= -55°C
I
D
(amperes)
R
DS(ON)
@ -10V, -0.2A
TP2522
3-Lead TO-243AA (SOT-89) Package Outline (N8)
Symbol
MIN
Dimensions
(mm)
NOM
MAX
A
1.40
-
1.60
b
0.44
-
0.56
b1
0.36
-
0.48
C
0.35
-
0.44
D
4.40
-
4.60
D1
1.62
-
1.83
E
2.29
-
2.60
E1
2.13
-
2.29
e
1.50
BSC
e1
3.00
BSC
H
3.94
-
4.25
L
0.89
-
1.20
JEDEC Registration TO-243, Variation AA, Issue C, July 1986.
Drawings not to scale.
Doc.# DSFP - TP2522
A101507
5
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