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UPA503T

Small Signal Field-Effect Transistor, 0.1A I(D), 50V, 2-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET

器件类别:分立半导体    晶体管   

厂商名称:NEC(日电)

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器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
NEC(日电)
包装说明
SMALL OUTLINE, R-PDSO-G5
Reach Compliance Code
compliant
ECCN代码
EAR99
配置
COMMON SOURCE, 2 ELEMENTS
最小漏源击穿电压
50 V
最大漏极电流 (ID)
0.1 A
最大漏源导通电阻
100 Ω
FET 技术
METAL-OXIDE SEMICONDUCTOR
JESD-30 代码
R-PDSO-G5
JESD-609代码
e0
元件数量
2
端子数量
5
工作模式
ENHANCEMENT MODE
封装主体材料
PLASTIC/EPOXY
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
NOT SPECIFIED
极性/信道类型
P-CHANNEL
认证状态
Not Qualified
表面贴装
YES
端子面层
TIN LEAD
端子形式
GULL WING
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
晶体管元件材料
SILICON
Base Number Matches
1
文档预览
DM74LS279 Quad S-R Latch
August 1986
Revised March 2000
DM74LS279
Quad S-R Latch
General Description
The DM74LS279 consists of four individual and indepen-
dent Set-Reset Latches with active low inputs. Two of the
four latches have an additional S input ANDed with the pri-
mary S input. A LOW on any S input while the R input is
HIGH will be stored in the latch and appear on the corre-
sponding Q output as a HIGH. A LOW on the R input while
the S input is HIGH will clear the Q output to a LOW. Simul-
taneous transition of the R and S inputs from LOW-to-
HIGH will cause the Q output to be indeterminate. Both
inputs are voltage level triggered and are not affected by
transition time of the input data.
Ordering Code:
Order Number
DM74LS279M
DM74LS279N
Package Number
M16A
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Inputs
S (Note 1)
L
L
H
H
R
L
H
L
H
Output
Q
H (Note 2)
H
L
Q
0
H
=
HIGH Level
L
=
LOW Level
Q
0
=
The Level of Q before the indicated input conditions were established.
Note 1:
For latches with double S inputs:
H
=
both S inputs HIGH
L
=
one or both S inputs LOW
Note 2:
This output level is pseudo stable; that is, it may not persist when
the S and R inputs return to their inactive (HIGH) level.
© 2000 Fairchild Semiconductor Corporation
DS006420
www.fairchildsemi.com
DM74LS279
Absolute Maximum Ratings
(Note 3)
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
7V
0°C to
+70°C
−65°C
to
+150°C
Note 3:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
T
A
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Free Air Operating Temperature
0
Parameter
Min
4.75
2
0.8
−0.4
8
70
Nom
5
Max
5.25
Units
V
V
V
mA
mA
°C
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
V
I
V
OH
V
OL
Parameter
Input Clamp Voltage
HIGH Level
Output Voltage
LOW Level
Output Voltage
I
I
I
IH
I
IL
I
OS
I
CC
Input Current @ Max Input Voltage
HIGH Level Input Current
LOW Level Input Current
Short Circuit Output Current
Supply Current
Conditions
V
CC
=
Min, I
I
= −18
mA
V
CC
=
Min, I
OH
=
Max
V
IL
=
Max, V
IH
=
Min
V
CC
=
Min, I
OL
=
Max
V
IL
=
Max, V
IH
=
Min
I
OL
=
4 mA, V
CC
=
Min
V
CC
=
Max, V
I
=
7V
V
CC
=
Max, V
I
=
2.7V
V
CC
=
Max, V
I
=
0.4V
V
CC
=
Max (Note 5)
V
CC
=
Max (Note 6)
−20
3.8
2.7
3.5
0.35
0.25
0.5
0.4
0.1
20
−0.4
−100
7
mA
µA
mA
mA
mA
Min
Typ
(Note 4)
Max
−1.5
Units
V
V
V
Note 4:
All typicals are at V
CC
=
5V, T
A
=
25°C.
Note 5:
Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 6:
I
CC
is measured with all R inputs grounded, all S inputs at 4.5V and all outputs OPEN.
Switching Characteristics
at V
CC
=
5V and T
A
=
25°C
From (Input)
Symbol
Parameter
To (Output)
C
L
=
15 pF
Min
t
PLH
t
PHL
t
PHL
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
S to Q
Max
22
R
L
=
2 kΩ
C
L
=
50 pF
Min
Max
25
ns
Units
S to Q
15
23
ns
R to Q
27
33
ns
www.fairchildsemi.com
2
DM74LS279
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
3
www.fairchildsemi.com
DM74LS279 Quad S-R Latch
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
4
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
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