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UPA652TT-E2-AT

TRANSISTOR,MOSFET,P-CHANNEL,20V V(BR)DSS,2A I(D),SOT-363VAR

器件类别:分立半导体    晶体管   

厂商名称:Renesas(瑞萨电子)

厂商官网:https://www.renesas.com/

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
Renesas(瑞萨电子)
Reach Compliance Code
compliant
配置
Single
最大漏极电流 (Abs) (ID)
2 A
FET 技术
METAL-OXIDE SEMICONDUCTOR
工作模式
ENHANCEMENT MODE
最高工作温度
150 °C
极性/信道类型
P-CHANNEL
最大功率耗散 (Abs)
1.3 W
表面贴装
YES
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Old Company Name in Catalogs and Other Documents
On April 1
st
, 2010, NEC Electronics Corporation merged with Renesas Technology
Corporation, and Renesas
Electronics Corporation
took over all the business of both
companies.
Therefore, although the old company name remains in this document, it is a valid
Renesas
Electronics document. We appreciate your understanding.
Renesas Electronics website: http://www.renesas.com
April 1
st
, 2010
Renesas Electronics Corporation
Issued by:
Renesas Electronics Corporation
(http://www.renesas.com)
Send any inquiries to http://www.renesas.com/inquiry.
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“Standard”:
2.
3.
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5.
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7.
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(Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majority-
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ
PA652TT
P-CHANNEL MOS FIELD EFFECT TRANSISTOR
FOR SWITCHING
DESCRIPTION
The
µ
PA652TT is a switching device, which can be driven directly by a
2.5 V power source.
This device features a low on-state resistance and excellent switching
characteristics, and is suitable for applications such as power switch of
portable machine and so on.
PACKAGE DRAWING (Unit: mm)
2.0±0.2
0.25±0.1
6
5
4
2.1±0.1
1.6
0
~
0.05
FEATURES
2.5 V drive available
Low on-state resistance
R
DS(on)1
= 294 mΩ MAX. (V
GS
=
−4.5
V, I
D
=
−1.0
A)
R
DS(on)2
= 336 mΩ MAX. (V
GS
=
−4.0
V, I
D
=
−1.0
A)
R
DS(on)3
= 514 mΩ MAX. (V
GS
=
−2.5
V, I
D
=
−0.5
A)
1
2
3
0.65
0.65
S
MAX. 0.8
ORDERING INFORMATION
0.05 S
PART NUMBER
PACKAGE
6pinWSOF (1620)
0.4±0.1
µ
PA652TT
0.15
+0.1
−0.05
Marking: WF
1,2,5,6 : Drain
3
: Gate
4
: Source
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Drain to Source Voltage (V
GS
= 0 V)
Gate to Source Voltage (V
DS
= 0 V)
Drain Current (DC)
Drain Current (pulse)
Note1
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T1
P
T2
T
ch
T
stg
−20
m12
m2.0
m8.0
0.2
1.3
150
−55
to +150
V
V
A
A
W
W
°C
°C
Gate
Gate
Protection
Diode
Body
Diode
Drain
0.2
+0.1
−0.05
0.1
M
S
EQUIVALENT CIRCUIT
Total Power Dissipation
Total Power Dissipation
Channel Temperature
Storage Temperature
Notes 1.
PW
10
µ
s, Duty Cycle
1%
Note2
2.
Mounted on FR-4 board of 5000 mm x 1.1 mm, t
5 sec.
2
Source
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD. When this
device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage
may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
G16204EJ1V0DS00 (1st edition)
Date Published September 2002 NS CP(K)
Printed in Japan
©
2002
µ
PA652TT
ELECTRICAL CHARACTERISTICS (T
A
= 25°C)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate Cut-off Voltage
Forward Transfer Admittance
Drain to Source On-state Resistance
SYMBOL
I
DSS
I
GSS
V
GS(off)
| y
fs
|
R
DS(on)1
R
DS(on)2
R
DS(on)3
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
G
Q
GS
Q
GD
V
F(S-D)
V
DD
=
16 V
V
GS
=
4.0 V
I
D
=
2.0 A
I
F
= 2.0 A, V
GS
= 0 V
TEST CONDITIONS
V
DS
=
20 V, V
GS
= 0 V
V
GS
=
m
12 V, V
DS
= 0 V
V
DS
=
10 V, I
D
=
250
µ
A
V
DS
=
10 V, I
D
=
1.0 A
V
GS
=
4.5 V, I
D
=
1.0 A
V
GS
=
4.0 V, I
D
=
1.0 A
V
GS
=
2.5 V, I
D
=
0.5 A
V
DS
=
10 V
V
GS
= 0 V
f = 1.0 MHz
V
DD
=
10 V, I
D
=
1.0 A
V
GS
=
4.0 V
R
G
= 10
MIN.
TYP.
MAX.
UNIT
10
m
10
0.5
1.0
µ
A
µ
A
V
S
1.1
2.4
235
252
385
126
47
17
28
101
80
85
1.1
0.4
0.5
0.93
1.5
294
336
514
mΩ
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
TEST CIRCUIT 1 SWITCHING TIME
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
D.U.T.
R
L
V
GS
PG.
R
G
Wave Form
V
GS (−)
0
10%
V
GS
90%
I
G
=
−2
mA
50
R
L
V
DD
V
DD
V
DS (−)
90%
90%
10%
10%
PG.
V
GS
(−)
0
τ
τ
= 1
µ
s
Duty Cycle
1%
V
DS
V
DS
Wave Form
0
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
2
Data Sheet G16204EJ1V0DS
µ
PA652TT
TYPICAL CHARACTERISTICS (T
A
= 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
dT - Percentage of Rated Power - %
120
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
1.6
P
T
- Total Power Dissipation - W
100
1.4
1.2
1
0.8
0.6
0.4
0.2
0
Mounted on FR-4 board of
2
5000 m m x 1.1 m m , t
5 sec.
80
60
40
20
0
0
25
50
75
100
125
150
175
0
25
50
75
100
125
150
175
T
A
- Ambient Temperature -
°C
T
A
- Ambient Temperature -
°C
FORWARD BIAS SAFE OPERATING AREA
- 10
PW = 100
µs
I
D (D C )
-1
1 ms
R
D S (o n )
Lim ited
(V
G S
= –4.5 V)
- 0.1
Single P ulse
M ounted on F R -4 board of
2
5000 m m x 1.1 m m
-1
- 10
- 100
10 m s
100 m s
5 s
I
D (p ulse )
I
D
- Drain Current - A
- 0.01
- 0.1
V
DS
- Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
r
th(ch-A)
- Transient Thermal Resistance -
°C/W
1000
Single Pulse
Mounted on FR-4 board of
2
5000 mm x 1.1 mm
100
10
1
1m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
Data Sheet G16204EJ1V0DS
3
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参数对比
与UPA652TT-E2-AT相近的元器件有:UPA652TT-E1、UPA652TT-E2、UPA652TT-A、UPA652TT-E2-A、UPA652TT-AT、UPA652TT-E1-AT。描述及对比如下:
型号 UPA652TT-E2-AT UPA652TT-E1 UPA652TT-E2 UPA652TT-A UPA652TT-E2-A UPA652TT-AT UPA652TT-E1-AT
描述 TRANSISTOR,MOSFET,P-CHANNEL,20V V(BR)DSS,2A I(D),SOT-363VAR UPA652TT-E1 UPA652TT-E2 TRANSISTOR,MOSFET,P-CHANNEL,20V V(BR)DSS,2A I(D),SOT-363VAR TRANSISTOR,MOSFET,P-CHANNEL,20V V(BR)DSS,2A I(D),SOT-363VAR TRANSISTOR,MOSFET,P-CHANNEL,20V V(BR)DSS,2A I(D),SOT-363VAR TRANSISTOR,MOSFET,P-CHANNEL,20V V(BR)DSS,2A I(D),SOT-363VAR
厂商名称 Renesas(瑞萨电子) Renesas(瑞萨电子) Renesas(瑞萨电子) Renesas(瑞萨电子) Renesas(瑞萨电子) Renesas(瑞萨电子) Renesas(瑞萨电子)
Reach Compliance Code compliant unknown unknown compliant compliant compliant compliant
是否Rohs认证 符合 - - 符合 符合 符合 符合
配置 Single - - Single Single Single Single
最大漏极电流 (Abs) (ID) 2 A - - 2 A 2 A 2 A 2 A
FET 技术 METAL-OXIDE SEMICONDUCTOR - - METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
工作模式 ENHANCEMENT MODE - - ENHANCEMENT MODE ENHANCEMENT MODE ENHANCEMENT MODE ENHANCEMENT MODE
最高工作温度 150 °C - - 150 °C 150 °C 150 °C 150 °C
极性/信道类型 P-CHANNEL - - P-CHANNEL P-CHANNEL P-CHANNEL P-CHANNEL
最大功率耗散 (Abs) 1.3 W - - 1.3 W 1.3 W 1.3 W 1.3 W
表面贴装 YES - - YES YES YES YES
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