DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
μ
PC4570
ULTRA LOW-NOISE, WIDEBAND, DUAL OPERATIONAL AMPLIFIER
DESCRIPTION
The
μ
PC4570 is an ultra low-noise, wideband high slew-rate, dual operational amplifier. Input equivalent noise is three
times better than the conventional 4558 type op-amps. The gain bandwidth products and the slew-rate are seven times
better than 4558. In spite of fast AC performance, the
μ
PC4570 is extremely stable under voltage-follower circuit
conditions. Supply current is also improved compared with conventional wideband op-amps. The
μ
PC4570 is an excellent
choice for pre-amplifiers and active filters in audio, instrumentation, and communication circuits.
FEATURES
•
Ultra low noise: e
n
= 4.5 nV/√Hz
•
High slew rate: 7 V/
μ
s
•
High gain bandwidth product: GBW = 15 MHz at 100 kHz
•
Internal frequency compensation
<R>
ORDERING INFORMATION
Part Number
Package
8-pin plastic DIP (7.62 mm (300))
8-pin plastic SOP (5.72 mm (225))
8-pin plastic SOP (5.72 mm (225))
I
I1
2
2
+
–
<R>
PIN CONFIGURATION (Top View)
μ
PC4570C, 4570G2
μ
PC4570C
μ
PC4570G2
μ
PC4570G2(5)
OUT
1
1
1
– +
8 V
+
7 OUT
2
6 I
I2
5 I
N2
EQUIVALENT CIRCUIT (1/2 Circuit)
V
+
R
1
Q
5
Q
11
Q
8
I
I
I
N
Q
1
Q
2
R
5
C
2
Q
6
Q
3
R
2
V
−
I
N1
3
V
−
4
Q
7
Q
14
Q
13
R
7
Q
9
R
6
R
8
R
9
Q
12
Q
10
R
4
R
10
D
Q
15
OUT
Q
16
Q
4
C
1
R
3
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G10528EJ8V0DS00 (8th edition)
Date Published December 2007 NS
Printed in Japan
1987
The mark <R> shows major revised points.
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
μ
PC4570
<R>
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Parameter
Voltage between V and V
Differential Input Voltage
Input Voltage
Note2
Note3
+
−
Note1
Symbol
V
+
−
V
−
V
ID
V
I
V
O
Ratings
−0.3
to
+36
±30
V
−
−
0.3 to V
+
0.3
V
−
−
0.3 to V
+
0.3
350
440
+
+
Unit
V
V
V
V
mW
mW
sec
°C
°C
Output Voltage
Power Dissipation
C Package
Note4
Note5
P
T
G2 Package
Output Short Circuit Duration
Note6
ts
T
A
T
stg
10
−20
to
+80
−55
to
+125
Operating Ambient Temperature
Storage Temperature
Notes 1.
Reverse connection of supply voltage can cause destruction.
2.
The input voltage should be allowed to input without damage or destruction. Even during the transition period of
supply voltage, power on/off etc., this specification should be kept. The normal operation will establish when the
both inputs are within the Common Mode Input Voltage Range of electrical characteristics.
3.
This specification is the voltage which should be allowed to supply to the output terminal from external without
damage or destruction. Even during the transition period of supply voltage, power on/off etc., this specification
should be kept. The output voltage of normal operation will be the Output Voltage Swing of electrical
characteristics.
4.
Thermal derating factor is
−5.0
mW/°C when operating ambient temperature is higher than 55°C.
5.
Thermal derating factor is
−4.4
mW/°C when operating ambient temperature is higher than 25°C.
6.
Pay careful attention to the total power dissipation not to exceed the absolute maximum ratings, Note 4 and
Note 5.
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Output Current
Source Resistance
Capacitive Load (A
V
=
+1)
Symbol
V
±
I
O
R
S
C
L
MIN.
±4
TYP.
MAX.
±16
±10
50
100
Unit
V
mA
kΩ
pF
2
Data Sheet G10528EJ8V0DS
μ
PC4570
<R>
μ
PC4570C,
μ
PC4570G2
ELECTRICAL CHARACTERISTICS (T
A
= 25°C, V
±
=
±15
V)
Parameter
Input Offset Voltage
Input Offset Current
Input Bias Current
Note7
Note7
Symbol
V
IO
I
IO
I
B
A
V
I
CC
CMR
SVR
V
om
Conditions
R
S
≤
50
Ω
MIN.
TYP.
±0.3
±10
100
MAX.
±5
±100
400
Unit
mV
nA
nA
Large Signal Voltage Gain
Supply Current
Note8
R
L
≥
2 kΩ , V
O
=
±10
V
I
O
= 0 A
30,000
300,000
5
8
mA
dB
dB
V
V
V
V/
μ
s
MHz
MHz
degree
%
Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
Output Voltage Swing
80
80
R
L
≥
10 kΩ
R
L
≥
2 kΩ
±12
±10
±12
R
L
≥
2 kΩ
f
O
= 100 kHz
open loop
open loop
V
O
= 3 V
r.m.s.
, f = 20 Hz to
20 kHz (Figure1)
5
10
100
100
±13.4
±12.8
±14
7
15
7
50
0.002
Common Mode Input Voltage Range
Slew Rate
Gain Bandwidth Product
Unity Gain Frequency
Phase Margin
Total Harmonic Distortion
V
ICM
SR
GBW
f
unity
φ
unity
THD
Input Equivalent Noise Voltage
V
n
RIAA (Figure2)
FLAT+JIS A, R
S
= 100
Ω
(Figure3)
0.9
0.53
0.65
μ
V
r.m.s.
μ
V
r.m.s.
nV/√Hz
nV/√Hz
pA/√Hz
dB
Input Equivalent Noise Voltage Density
e
n
f
O
= 10 Hz, R
S
= 100
Ω
f
O
= 1 kHz, R
S
= 100
Ω
5.5
4.5
0.7
120
Input Equivalent Noise Current Density
Channel Separation
i
n
f
O
= 1 kHz
f = 20 Hz to 20 kHz
Notes
7.
Input bias currents flow out from IC. Because each currents are base current of PNP-transistor on input stage
8.
This current flows irrespective of the existence of use.
Data Sheet G10528EJ8V0DS
3
μ
PC4570
μ
PC4570G2(5)
ELECTRICAL CHARACTERISTICS (T
A
= 25°C, V
±
=
±15
V)
Parameter
Input Offset Voltage
Input Offset Current
Input Bias Current
Note7
Note7
Symbol
V
IO
I
IO
I
B
A
V
I
CC
CMR
SVR
V
om
Conditions
R
S
≤
50
Ω
MIN.
TYP.
±0.3
±10
100
MAX.
±1
±50
200
Unit
mV
nA
nA
Large Signal Voltage Gain
Supply Current
Note8
R
L
≥
2 kΩ , V
O
=
±10
V
I
O
= 0 A
50,000
300,000
5
7
mA
dB
dB
V
V
V
V/
μ
s
MHz
MHz
degree
%
Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
Output Voltage Swing
85
85
R
L
≥
10 kΩ
R
L
≥
2 kΩ
±13
±12
±13.5
R
L
≥
2 kΩ
f
O
= 100 kHz
open loop
open loop
V
O
= 3 V
r.m.s.
, f = 20 Hz to
20 kHz (Figure1)
5
10
100
100
±13.4
±12.8
±14
7
15
7
50
0.002
Common Mode Input Voltage Range
Slew Rate
Gain Bandwidth Product
Unity Gain Frequency
Phase Margin
Total Harmonic Distortion
V
ICM
SR
GBW
f
unity
φ
unity
THD
Input Equivalent Noise Voltage
V
n
RIAA (Figure2)
FLAT+JIS A, R
S
= 100
Ω
(Figure3)
0.9
0.53
0.65
μ
V
r.m.s.
μ
V
r.m.s.
nV/√Hz
nV/√Hz
pA/√Hz
dB
Input Equivalent Noise Voltage Density
e
n
f
O
= 10 Hz, R
S
= 100
Ω
f
O
= 1 kHz, R
S
= 100
Ω
5.5
4.5
0.7
120
Input Equivalent Noise Current Density
Channel Separation
i
n
f
O
= 1 kHz
f = 20 Hz to 20 kHz
Notes
7.
Input bias currents flow out from IC. Because each currents are base current of PNP-transistor on input stage
8.
This current flows irrespective of the existence of use.
4
Data Sheet G10528EJ8V0DS
μ
PC4570
MEASUREMENT CIRCUIT
Figure1 Total Harmonic Distortion Measurement Circuit
−
V
O
= 3 V
r.m.s.
+
2 kΩ
Figure2 Noise Measurement Circuit (RIAA)
2 400 pF
8 200 pF
610
Ω
47
μF
+
2.2 kΩ
33
μF
56 kΩ
+
−
+
30 kΩ
330 kΩ
1.5
μF
+
40 dB Amp.
LPF
(f
O
= 30 kHz)
100 kΩ
V
O
= (36.5 dB+40 dB)
×
V
n
V
O
V
n
=
76.5 dB
Figure3 Noise Measurement Circuit (FLAT+JIS A)
10 kΩ
−
100
Ω
JIS A
+
R
S
=
100
Ω
V
O
= 40 dB
×
V
n
V
O
V
n
=
40 dB
Data Sheet G10528EJ8V0DS
5
