PRELIMINARY DATA SHEET
µ
PD70F3102-A33
V850/MS1
32-/16-BIT SINGLE-CHIP MICROCONTROLLER
TM
MOS INTEGRATED CIRCUITS
The
µ
PD70F3102-A33 is a product that substitutes the internal mask ROM of the
µ
PD703102-A33 with flash
memory. This enables users to perform on-board program writing and erasure, enabling effective evaluation during
system development, small-lot production of multiple device, and rapid production start, and quick development and
time-to-market.
A version using a 5.0-V power supply for external pins, the
µ
PD70F3102-33 is also available.
For additional information, refer to the following user’s manuals. Be sure to read them before starting
design.
V850E/MS1 User’s Manual Hardware:
U12688E
V850E/MS1 User’s Manual Architecture: U12197E
FEATURES
•
µ
PD703102-A33 compatible
Can be replaced by the
µ
PD703102-A33 with internal mask ROM for mass production
•
Internal flash memory: 128 Kbytes
ORDERING INFORMATION
Part Number
Package
157-pin plastic FBGA (14
×
14 mm)
144-pin plastic LQFP (fine pitch) (20
×
20 mm)
µ
PD70F3102F1-A33-FA1
µ
PD70F3102GJ-A33-8EU
The information in this document is subject to change without notice.
Document No. U13845EJ1V1DS00 (1st edition)
Date Published November 1998 N CP(K)
Printed in Japan
©
1998
µ
PD70F3102-A33
PIN CONFIGURATION (Top View)
157-pin plastic FBGA (14
×
14 mm)
•
µ
PD70F3102F1-A33-FA1
Top View
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
A B C D E F G H J K L M N P R T
Index mark
T R P N M L K J H G F E D C B A
Index mark
Bottom View
(1/2)
Pin No.
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
–
D0/P40
D2/P42
D4/P44
D6/P46
D8/P50
D10/P52
D13/P55
A0/PA0
A2/PA2
A5/PA5
A8/PB0
A10/PB2
A13/PB5
A15/PB7
–
Name
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
Pin No.
Name
INTP103/DMARQ3/P07
D1/P41
D3/P43
D5/P45
D7/P47
D9/P51
D11/P53
D14/P56
A1/PA1
A3/PA3
A6/PA6
A9/PB1
A11/PB3
A14/PB6
A17/P61
A16/P60
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
Pin No.
Name
INTP101/DMARQ1/P05
INTP102/DMARQ2/P06
V
SS
V
SS
HV
DD
V
SS
D12/P54
D15/P57
HV
DD
A4/PA4
A7/PA7
V
SS
A12/PB4
A18/P62
A19/P63
–
2
Preliminary Data Sheet
µ
PD70F3102-A33
(2/2)
Pin No.
D1
D2
D3
D4
D14
D15
D16
E1
E2
E3
E14
E15
E16
F1
F2
F3
F14
F15
F16
G1
G2
G3
G14
G15
G16
H1
H2
H3
H14
H15
H16
J1
J2
J3
J14
J15
J16
Name
TI10/P03
INTP100/DMARQ0/P04
HV
DD
–
V
SS
A21/P65
A20/P64
TO101/P01
TCLR10/P02
V
SS
HV
DD
A23/P67
A22/P66
INTP113/DMAAK3/P17
TO100/P00
V
DD
CS2/RAS2/P82
CS1/RAS1/P81
CS0/RAS0/P80
INTP110/DMAAK0/P14
INTP111/DMAAK1/P15
INTP112/DMAAK2/P16
CS5/RAS5/IORD/P85
CS4/RAS4/IOWR/P84
CS3/RAS3/P83
TO111/P11
TCLR11/P12
TI11/P13
LCAS/LWR/P90
CS7/RAS7/P87
CS6/RAS6/P86
INTP122/TC2/P106
INTP123/TC3/P107
TO110/P10
WE/P93
RD/P92
UCAS/UWR/P91
K1
K2
K3
K14
K15
K16
L1
L2
L3
L14
L15
L16
M1
M2
M3
M14
M15
M16
N1
N2
N3
N14
N15
N16
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
Pin No.
Name
TI12/P103
INTP120/TC0/P104
INTP121/TC1/P105
HLDAK/P96
OE/P95
BCYST/P94
TO120/P100
TO121/P101
TCLR12/P102
V
SS
REFRQ/PX5
HLDRQ/P97
ANI5/P75
ANI6/P76
ANI7/P77
TO150/P120
WAIT/PX6
CLKOUT/PX7
ANI2/P72
ANI3/P73
ANI4/P74
TI15/P123
TCLR15/P122
TO151/P121
AV
DD
ANI1/P71
TXD0/SO0/P22
TXD1/SO1/P25
V
DD
INTP133/SCK2/P37
INTP130/P34
TO131/P31
INTP142/SI3/P116
TI14/P113
TO141/P111
CKSEL
HV
DD
Pin No.
P14
P15
P16
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
–
–
RESET
INTP151/P125
INTP150/P124
AV
SS
ANI0/P70
P21
SCK0/P24
SCK1/P27
INTP132/SI2/P36
TI13/P33
TO130/P30
INTP141/SO3/P115
TCLR14/P112
TO140/P110
MODE0
MODE1
MODE2
INTP153/ADTRG/P127
INTP152/P126
–
AV
REF
NMI/P20
RXD0/SI0/P23
RXD1/SI1/P26
INTP131/SO2/P35
TCLR13/P32
INTP143/SCK3/P117
INTP140/P114
CV
DD
X2
X1
CV
SS
MODE3/V
PP
–
–
–
–
Name
Remark
Leave pins A1, A16, C16, D4, T1, T15, and T16 open.
Preliminary Data Sheet
3
µ
PD70F3102-A33
144-pin plastic LQFP (fine pitch) (20
×
20 mm)
•
µ
PD70F3102GJ-A33-8EU
V
DD
D0/P40
D1/P41
D2/P42
D3/P43
D4/P44
D5/P45
D6/P46
D7/P47
V
SS
D8/P50
D9/P51
D10/P52
D11/P53
D12/P54
D13/P55
D14/P56
D15/P57
HV
DD
A0/PA0
A1/PA1
A2/PA2
A3/PA3
A4/PA4
A5/PA5
A6/PA6
A7/PA7
V
SS
A8/PB0
A9/PB1
A10/PB2
A11/PB3
A12/PB4
A13/PB5
A14/PB6
A15/PB7
INTP103/DMARQ3/P07
INTP102/DMARQ2/P06
INTP101/DMARQ1/P05
INTP100/DMARQ0/P04
TI10/P03
TCLR10/P02
TO101/P01
TO100/P00
V
SS
INTP113/DMAAK3/P17
INTP112/DMAAK2/P16
INTP111/DMAAK1/P15
INTP110/DMAAK0/P14
TI11/P13
TCLR11/P12
TO111/P11
TO110/P10
INTP123/TC3/P107
INTP122/TC2/P106
INTP121/TC1/P105
INTP120/TC0/P104
TI12/P103
TCLR12/P102
TO121/P101
TO120/P100
ANI7/P77
ANI6/P76
ANI5/P75
ANI4/P74
ANI3/P73
ANI2/P72
ANI1/P71
ANI0/P70
AV
DD
AV
SS
AV
REF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
A16/P60
A17/P61
A18/P62
A19/P63
A20/P64
A21/P65
A22/P66
A23/P67
HV
DD
CS0/RAS0/P80
CS1/RAS1/P81
CS2/RAS2/P82
CS3/RAS3/P83
CS4/RAS4/IOWR/P84
CS5/RAS5/IORD/P85
CS6/RAS6/P86
CS7/RAS7/P87
LCAS/LWR/P90
UCAS/UWR/P91
RD/P92
WE/P93
BCYST/P94
OE/P95
HLDAK/P96
HLDRQ/P97
V
SS
REFRQ/PX5
WAIT/PX6
CLKOUT/PX7
TO150/P120
TO151/P121
TCLR15/P122
TI15/P123
INTP150/P124
INTP151/P125
INTP152/P126
4
NMI/P20
P21
TXD0/SO0/P22
RXD0/SI0/P23
SCK0/P24
TXD1/SO1/P25
RXD1/SI1/P26
SCK1/P27
V
DD
INTP133/SCK2/P37
INTP132/SI2/P36
INTP131/SO2/P35
INTP130/P34
TI13/P33
TCLR13/P32
TO131/P31
TO130/P30
INTP143/SCK3/P117
INTP142/SI3/P116
INTP141/SO3/P115
INTP140/P114
TI14/P113
TCLR14/P112
TO141/P111
TO140/P110
CV
DD
X2
X1
CV
SS
CKSEL
MODE0
MODE1
MODE2
MODE3/V
PP
RESET
INTP153/ADTRG/P127
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
Preliminary Data Sheet
µ
PD70F3102-A33
PIN IDENTIFICATION
A0 to A23:
ADTRG:
ANI0 to ANI7:
AV
DD:
AV
REF
:
AV
SS
:
BCYST:
CKSEL:
CLKOUT:
CS0 to CS7:
CV
DD
:
CV
SS
:
D0 to D15:
Address Bus
AD Trigger Input
Analog Input
Analog Power Supply
Analog Reference Voltage
Analog Ground
Bus Cycle Start Timing
Clock Generator Operating Mode
Select
Clock Output
Chip Select
Clock Generator Power Supply
Clock Generator
Data Bus
P50 to P57:
P60 to P67:
P70 to P77:
P80 to P87:
P90 to P97:
P100 to P107:
P110 to P117:
P120 to P127:
PA0 to PA7:
PB0 to PB7:
PX5 to PX7:
RAS0 to RAS7:
RD:
REFRQ:
RESET:
RXD0, RXD1:
SCK0 to SCK3:
SI0 to SI3:
SO0 to SO3:
TC0 to TC3:
TI10 to TI15:
TO100, TO101,
TO110, TO111,
Interrupt Request from Peripherals TO120, TO121,
I/O Read Strobe
I/O Write Strobe
Lower Column Address Strobe
Lower Write Strobe
Mode
Output Enable
Port0
Port1
Port2
Port3
Port4
TO130, TO131,
TO140, TO141,
TO150, TO151:
TXD0, TXD1:
UCAS:
V
DD
:
V
PP
:
V
SS
:
WAIT:
WE:
X1, X2:
Timer Output
Transmit Data
Upper Column Address Strobe
Upper Write Strobe
Power Supply for Internal Unit
Programming Power Supply
Groung
Wait
Write Enable
Crystal
Port5
Port6
Port7
Port8
Port9
Port10
Port11
Port12
Port A
Port B
Port X
Row Address Stobe
Read
Refresh Request
Reset
Receive Data
Serial Clock
Serial Input
Serial Output
Terminal Count Signal
Timer Input
DMAAK0 to DMAAK3: DMA Acknowledge
CMARQ0 to DMARQ3: DMA Request
HLDAK:
HLDRQ:
HV
DD
:
INTP100 to INTP103,
INTP110 to INTP113,
INTP120 to INTP123,
INTP130 to INTP133,
INTP140 to INTP143,
INTP150 to INTP153:
IORD:
IOWR:
LCAS:
LWR:
MODE0 to MODE3:
NMI:
OE:
P00 to P07:
P10 to P17:
P20 to P27:
P30 to P37:
P40 to P47:
Hold Acknowledge
Hold Request
Power Supply for External Pins
TCLR10 to TCLR15: Timer Clear
Non-Maskable Interrupt Request UWR:
Preliminary Data Sheet
5
