TCO UP AND TCO DOWN OUTPUTS; SEPARATE UP/DOWN CLOCK
计数方向
BIDIRECTIONAL
系列
ACT
JESD-30 代码
R-CDFP-F16
JESD-609代码
e0
负载/预设输入
YES
逻辑集成电路类型
BINARY COUNTER
最大频率@ Nom-Sup
56000000 Hz
最大I（ol）
0.008 A
工作模式
SYNCHRONOUS
位数
4
功能数量
1
端子数量
16
最高工作温度
125 °C
最低工作温度
-55 °C
封装主体材料
CERAMIC, METAL-SEALED COFIRED
封装代码
DFP
封装等效代码
FL16,.3
封装形状
RECTANGULAR
封装形式
FLATPACK
电源
5 V
传播延迟（tpd）
24 ns
认证状态
Not Qualified
座面最大高度
2.921 mm
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
MILITARY
端子面层
Tin/Lead (Sn/Pb)
端子形式
FLAT
端子节距
1.27 mm
端子位置
DUAL
触发器类型
POSITIVE EDGE
宽度
6.731 mm
Base Number Matches
1
文档预览
UT54ACS193/UT54ACTS193
Radiation-Hardened
Synchronous 4-Bit Up-Down Dual Clock Counters
FEATURES
Look-ahead circuitry enhances cascaded counters
Fully synchronous in count modes
Asynchronous clear
radiation-hardened CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
16-pin DIP
-
DESCRIPTION
The UT54ACS193 and the UT54ACTS193 are synchronous 4-
operation is provided by having all flip-flops clocked
simultaneously so that the outputs change coincident with each
output counting spikes normally associated with asynchronous
counters.
level transition of either count input (Up or Down). The direc-
tion of the counting is determined by which count input is pulsed
PINOUTS
Top View
B
Q
B
Q
A
DOWN
UP
Q
C
Q
D
V
SS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
A
CLR
BO
CO
LOAD
C
D
16-Lead Flatpack
B
Q
B
Q
A
DOWN
UP
Q
C
Q
D
V
SS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
A
CLR
BO
CO
LOAD
C
D
FUNCTION TABLE
FUNCTION
The counters are fully programmable. The outputs may be pre-
set to either level by placing a low on the load input and entering
agree with the data inputs independently of the count pulses.
Asynchronous loading allows the counters to be used as modu-
preset inputs.
A clear input has been provided that forces all outputs to the low
pendent of the count and the load inputs.
The counter is designed for efficient cascading without the need
BO) produces a low-
Similarly, the carry output (CO
while the count is maximum
CLOCK
UP
CLOCK
DOWN
H
CLR
L
L
LOAD
H
H
X
L
Count Up
Count Down
Reset
Load Preset
Input
H
X
X
X
X
H
L
137
RadHard MSI Logic
UT54ACS193/UT54ACTS193
LOGIC SYMBOL
(14)
CLR
(5)
UP
DOWN
LOAD
A
(4)
(11)
(15)
CTRDIV 16
CT=0
1CT=15
2+
G1
1-
G2
C3
3D
(1)
(2)
(4)
(8)
2CT=0
(12)
CO
(13)
BO
(3)
(2)
(1)
B
(10)
C
(9)
D
Q
A
Q
B
(6)
Q
C
(7)
Q
D
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC Publi-
cation 617-12.
RadHard MSI Logic
138
UT54ACS193/UT54ACTS193
LOGIC DIAGRAM
(13)
(12)
A
(15)
SQ
C
RQ
BO
CO
DOWN (4)
UP (5)
(3) Q
A
B (1)
SQ
C
RQ
(2) Q
B
C
(10)
SQ
C
RQ
(6) Q
C
D (9)
CLR (14)
SQ
C
RQ
(7) Q
D
LOAD (11)
139
RadHard MSI Logic
UT54ACS193/UT54ACTS193
RADIATION HARDNESS SPECIFICATIONS
1
PARAMETER
Total Dose
SEU Threshold
2
SEL Threshold
Neutron Fluence
LIMIT
1.0E6
80
120
1.0E14
UNITS
rads(Si)
MeV-cm
2
/mg
MeV-cm
2
/mg
n/cm
2
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
DD
V
I/O
T
STG
T
J
T
LS
JC
PARAMETER
Supply voltage
Voltage any pin
Storage Temperature range
Maximum junction temperature
Lead temperature (soldering 5 seconds)
Thermal resistance junction to case
DC input current
Maximum power dissipation
LIMIT
-0.3 to 7.0
-.3 to V
DD
+.3
-65 to +150
+175
+300
20
10
1
UNITS
V
V
C
C
C
C/W
mA
W
I
I
P
D
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device
at these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for
