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WMS512K8L-120DEME

Standard SRAM, 512KX8, 120ns, CMOS, CDSO32, CERAMIC, SOJ-32

器件类别:存储    存储   

厂商名称:White Electronic Designs Corporation

厂商官网:http://www.wedc.com/

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器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
White Electronic Designs Corporation
包装说明
CERAMIC, SOJ-32
Reach Compliance Code
unknown
最长访问时间
120 ns
JESD-30 代码
R-CDSO-J32
JESD-609代码
e4
长度
21.1 mm
内存密度
4194304 bit
内存集成电路类型
STANDARD SRAM
内存宽度
8
功能数量
1
端子数量
32
字数
524288 words
字数代码
512000
工作模式
ASYNCHRONOUS
最高工作温度
125 °C
最低工作温度
-55 °C
组织
512KX8
封装主体材料
CERAMIC, METAL-SEALED COFIRED
封装代码
SOJ
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
并行/串行
PARALLEL
峰值回流温度(摄氏度)
NOT SPECIFIED
认证状态
Not Qualified
座面最大高度
3.96 mm
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
MILITARY
端子面层
GOLD
端子形式
J BEND
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
Base Number Matches
1
文档预览
White Electronic Designs
WMS512K8-XXX
512Kx8, MONOLITHIC SRAM, SMD 5962-95613
FEATURES
Access Times 70, 85, 100, 120ns
MIL-STD-883 Compliant Devices Available
Evolutionary, Corner Power/Ground Pinout JEDEC
Approved
32 pin Ceramic DIP (Package 300)
32 lead Ceramic SOJ (Package 101)
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
EVOLUTIONARY PINOUT
32 DIP
32 CSOJ (DE)
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A15
A17
WE#
A13
A8
A9
A11
OE#
A10
CS#
I/O7
I/O6
I/O5
I/O4
I/O3
Commercial, Industrial and Military Temperature
Ranges
5V Power Supply
Low Power CMOS
Low Power Data Retention
TTL Compatible Inputs and Outputs
PIN DESCRIPTION
A
0-18
I/O
0-7
CS#
OE#
WE#
V
CC
GND
Address Inputs
Data Input/Output
Chip Select
Output Enable
Write Enable
+5.0V Power
Ground
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
March, 2003
Rev. 4
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
Parameter
Operating Temperature
Storage Temperature
Signal Voltage Relative to GND
Junction Temperature
Supply Voltage
Symbol
T
A
T
STG
VG
TJ
V
CC
-0.5
Min
-55
-65
-0.5
Max
+125
+150
Vcc+0.5
150
7.0
Unit
°C
°C
V
°C
V
Parameter
Input capacitance
Output capacitance
CS#
H
L
L
L
OE#
X
L
X
H
WE#
X
H
L
H
WMS512K8-XXX
TRUTH TABLE
Mode
Standby
Read
Write
Out Disable
(T
A
= +25°C)
Symbol
C
IN
C
OUT
Condition
V
IN
= 0V, f = 1.0MHz
V
OUT
= 0V, f = 1.0MHz
Max
12
12
Unit
pF
pF
Data I/O
High Z
Data Out
Data In
High Z
Power
Standby
Active
Active
Active
CAPACITANCE
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Operating Temp. (Mil.)
Symbol
V
CC
V
IH
V
IL
T
A
Min
4.5
2.2
-0.3
-55
Max
5.5
V
CC
+ 0.3
+0.8
+125
Unit
V
V
V
°C
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55°C to +125°C)
Parameter
Input Leakage Current
Output Leakage Current
Operating Supply Current
Standby Current
Output Low Voltage
Output High Voltage
Symbol
I
LI
I
LO
I
CC
I
SB
V
OL
V
OH
Conditions
V
CC
= 5.5, V
IN
= GND to V
CC
CS# = V
IH
, OE# = V
IH
, V
OUT
= GND to V
CC
CS# = V
IL
, OE# = V
IH
, f = 5MHz, V
CC
= 5.5
CS# = V
IH
, OE# = V
IH
, f = 5MHz, V
CC
= 5.5
I
OL
= 2.1mA, V
CC
= 4.5
I
OH
= -1.0mA, V
CC
= 4.5
Units
Min
10
10
50
1
0.4
2.4
Max
μA
μA
mA
mA
V
V
NOTE: DC test conditions: V
IH
= V
CC
-0.3V, V
IL
= 0.3V
DATA RETENTION CHARACTERISTICS
(T
A
= -55°C to +125°C)
Parameter
Data Retention Supply Voltage
Data Retention Current
Symbol
VDR
I
CC
DR1
Conditions
CS#
V
CC
-0.2V
V
CC
= 3V
Military
Min
2.0
100
Typ
Max
5.5
400
Units
V
μA
DATA RETENTION CHARACTERISTICS FOR LOW POWER “L” VERSION
Parameter
Data Retention Supply Voltage
Low Power Data Retention (L)
Symbol
VDR
I
CC
DR1
Conditions
CS#
V
CC
-0.2V
V
CC
= 2V
Min
2.0
Max
5.5
185
Units
V
μA
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
March, 2003
Rev. 4
2
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55°C to +125°C)
Parameter
Read Cycle
Read Cycle Time
Address Access Time
Output Hold from Address Change
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
t
RC
t
AA
t
OH
t
ACS
t
OE
t
CLZ
1
t
OLZ
1
t
CHZ
1
1
WMS512K8-XXX
Symbol
Min
70
-70
Max
70
5
70
35
10
5
25
25
10
5
5
Min
85
-85
Max
85
5
85
40
10
5
25
25
Min
100
-100
Max
100
5
100
50
10
5
35
35
Min
120
-120
Max
Units
ns
120
120
60
ns
ns
ns
ns
ns
ns
35
35
ns
ns
Output Disable to Output in High Z
t
OHZ
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55°C to +125°C)
Parameter
Write Cycle
Write Cycle Time
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
Output Active from End of Write
Write Enable to Output in High Z
Data Hold from Write Time
t
WC
t
CW
t
AW
t
DW
t
WP
t
AS
t
AH
t
OW
t
DH
1
1
Symbol -70
Min
70
60
60
30
50
0
5
5
25
0
Max
-85
Min
85
75
75
30
50
0
5
5
25
0
Max
-100
Min
100
80
80
40
60
0
5
5
35
0
Max
-120
Min
120
100
100
40
60
0
5
5
35
0
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
WHZ
1. This parameter is guaranteed by design but not tested.
AC TEST CIRCUIT
I
OL
Current Source
AC TEST CONDITIONS
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
Typ
V
IL
= 0, V
IH
= 3.0
5
1.5
1.5
Unit
V
ns
V
V
D.U.T.
C
eff
= 50 pf
V
Z
1.5V
(Bipolar Supply)
I
OH
Current Source
Notes:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z0 = 75
Ω.
VZ is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
March, 2003
Rev. 4
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
TIMING WAVEFORM - READ CYCLE
WMS512K8-XXX
t
RC
ADDRESS
t
RC
ADDRESS
t
AA
CS#
t
AA
t
OH
DATA I/O
PREVIOUS DATA VALID
DATA VALID
t
ACS
t
CLZ
OE#
t
CHZ
READ CYCLE 1 (CS# = OE# = V
IL
, WE# = V
IH
)
t
OE
t
OLZ
DATA I/O
HIGH IMPEDANCE
t
OHZ
DATA VALID
READ CYCLE 2 (WE# = V
IH
)
WRITE CYCLE - WE# CONTROLLED
t
WC
ADDRESS
t
AW
CS
t
CW
t
AH
t
AS
WE
t
WP
t
OW
t
WHZ
t
DW
t
DH
DATA I/O
DATA VALID
WRITE CYCLE 1, WE CONTROLLED
WRITE CYCLE - CS# CONTROLLED
t
WC
ADDRESS
t
AS
CS#
t
AW
t
CW
t
WP
t
AH
WE#
t
DW
DATA I/O
DATA VALID
t
DH
WRITE CYCLE 2, CS# CONTROLLED
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
March, 2003
Rev. 4
4
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
PACKAGE 101: 32 LEAD, CERAMIC SOJ
21.1 (0.830) ± 0.25 (0.010)
0.2 (0.008)
± 0.05 (0.002)
WMS512K8-XXX
3.96 (0.156) MAX
0.89 (0.035)
Radius TYP
11.23 (0.442)
± 0.30 (0.012)
9.55 (0.376) ± 0.25 (0.010)
1.27 (0.050) ± 0.25 (0.010)
1.27 (0.050) TYP
19.1 (0.750) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 300: 32 PIN, CERAMIC DIP, SINGLE CAVITY SIDE BRAZED
42.8
(1.686) MAX
5.13 (0.202) MAX
3.2 (0.125) MIN
0.99 (0.039)
±
0.51 (0.020)
0.25 (0.010)
±
0.05 (0.002)
15.25 (0.600)
±
0.25 (0.010)
2.5 (0.100)
TYP
1.27 (0.050)
±
0.1 (0.005)
0.46 (0.018)
±
0.05 (0.002)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
March, 2003
Rev. 4
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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