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White Electronic Designs

WV3EG232M64EFSU-D4

ADVANCED*

512MB – 2x32Mx64 DDR SDRAM, UNBUFFERED, w/PLL, FBGA

FEATURES

Fast data transfer rate: PC-2100 and PC-2700

Clock speeds of 133 MHz and 166 MHz

Two data transfers per clock cycle

Supports ECC error detection and correction

Bi-directional data strobes (DQS)

Differential clock inputs (CK & CK#)

Programmable Read Latency 2 and 2.5 (clock)

Programmable Burst Length (2, 4 or 8)

Programmable Burst type (sequential & interleave)

Edge aligned data output, center aligned data input

Auto and self refresh

Serial presence detect (SPD) with EEPROM

Dual Rank

Power supply: V

= V

CCQ

= +2.5V ±0.2V (133 and

166MHz)

Gold edge contacts

200 pin, small-outline, SO-DIMM package

• PCB height option:

31.75 mm (1.25”)

NOTE: Consult factory for availability of:

• RoHS compliant products

• Vendor source control options

• Industrial temperature option

* This product is under development, is not qualiﬁed or characterized and is subject to

change or cancellation without notice.

DESCRIPTION

The WV3EG232M64EFSU is a 2x32Mx64 Double Data

Rate SDRAM memory module based on 256Mb DDR

SDRAM components. The module consists of sixteen

32Mx8 4 banks DDR SDRAMs in FBGA packages

mounted on a 200 pin FR4 substrate.

Synchronous design allows precise cycle control with the

use of system clock. Data I/O transactions are possible on

both edges and Burst Lengths allow the same device to be

useful for a variety of high bandwidth, high performance

memory system applications.

OPERATING FREQUENCIES

DDR333@CL=2.5

Clock Speed

CL-t

RCD

-t

166MHz

2.5-3-3

DDR266@CL=2

133MHz

2-2-2

DDR266@CL=2.5

133MHz

2.5-3-3

April 2005

Rev. 0

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

White Electronic Designs

PIN CONFIGURATION

PIN# SYMBOL PIN# SYMBOL PIN# SYMBOL PIN# SYMBOL

101

151

DQ42

REF

102

152

DQ46

DQ19

103

153

DQ43

DQ23

104

154

DQ47

DQ0

DQ24

105

155

DQ4

DQ28

106

156

DQ1

107

157

DQ5

108

158

*CK1#

DQ25

109

159

DQ29

110

160

*CK1

DQS0

DQS3

111

161

DM0

DM3

112

162

DQ2

113

163

DQ48

DQ6

114

164

DQ52

DQ26

115

A10/AP

165

DQ49

DQ30

116

BA1

166

DQ53

DQ3

DQ27

117

BA0

167

DQ7

DQ31

118

RAS#

168

DQ8

119

WE#

169

DQS6

DQ12

120

CAS#

170

DM6

121

CS0#

171

DQ50

122

CS1#

172

DQ54

DQ9

123

173

DQ13

124

174

DQS1

125

175

DQ51

DM1

126

176

DQ55

DNU

127

DQ32

177

DQ56

DNU

128

DQ36

178

DQ60

DQ10

129

DQ33

179

DQ14

130

DQ37

180

DQ11

131

181

DQ57

DQ15

132

182

DQ61

133

DQS4

183

DQS7

134

DM4

184

DM7

CK0

135

DQ34

185

136

DQ38

186

CK0#

137

187

DQ58

138

188

DQ62

CK2*

139

DQ35

189

DQ59

140

DQ39

190

DQ63

DQ16

CK2#*

141

DQ40

191

DQ20

CC*

142

DQ44

192

DQ17

143

193

SDA

DQ21

144

194

SA0

CKE1

145

DQ41

195

SCL

CKE0

146

DQ45

196

SA1

DQS2

147

DQS5

197

CCSPD

DM2

148

DM5

198

SA2

DQ18

A12

149

199

DQ22

100

A11

150

200

WV3EG232M64EFSU-D4

ADVANCED

PIN NAMES

Symbol

A0-A12

BA0, BA1

DQ0-DQ63

CK0, CK0#

CKE0-CKE1

CS0#-CS1#

WE#, CAS#, RAS#

DQS0-DQS7

DM0-DM7

CCQ

CCSPD

REF

SCL

SA0-SA2

CCID

SDA

DNU

RESET#

Description

Address input

Bank Address

Input/Output: Data I/Os, Data bus

Clock Input

Clock Enable Input

Chip Select Input

Command Input

Data Strobe

Data Write Mask

Supply: Power Supply: +2.5V ±0.2V

Power Supply for DQS

Supply: Serial EEPROM Positive

Power Supply

Supply: SSTL_2 reference voltage

Supply: Ground

Serial Clock

Presence Detect Address Input

Identiﬁcation Flag

Input/Output: Serial Presence-Detect

Data

No Connect

Do Not Use

Reset Enable

* These pins are not used in this module.

April 2005

Rev. 0

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

White Electronic Designs

WV3EG232M64EFSU-D4

ADVANCED

FUNCTIONAL BLOCK DIAGRAM

CS1# CKE1

CS0# CKE0

DQS0

DM0

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQS1

DM1

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQS2

DM2

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

DQS2

DM2

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DQS4

DM4

DQ32

DQ33

DQ34

DQ35

DQ36

DQ37

DQ38

DQ39

DQS5

DM5

DQ40

DQ41

DQ42

DQ43

DQ44

DQ45

DQ46

DQ47

DQS6

DM6

DQ48

DQ49

DQ50

DQ51

DQ52

DQ53

DQ54

DQ55

DQS7

DM7

DQ56

DQ57

DQ58

DQ59

DQ60

DQ61

DQ62

DQ63

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DQS S0#

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

BA0, BA1

A0-A12

RAS#

CAS#

WE#

CCSPD

REF

BA0, BA1: DDR SDRAMs

A0-A12: DDR SDRAMs

RAS#: DDR SDRAMs

CAS#: DDR SDRAMs

WE#: DDR SDRAMs

SPD

DDR SDRAMs

CK0

CK0#

SERIAL PD

SCL

SDA

SA0 SA1 SA2

PLL

DDR SDRAM

NOTE: 1.All resistor values are 22 Ω unless otherwise speciﬁed.

April 2005

Rev. 0

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

White Electronic Designs

WV3EG232M64EFSU-D4

ADVANCED

ABSOLUTE MAXIMUM RATINGS

Parameter

Voltage on any pin relative to Vss

Voltage on V

supply relative to Vss

Voltage on V

CCQ

supply relative to Vss

Storage temperature

Power dissipation

Short circuit current

Symbol

, V

OUT

CCQ

STG

Value

-0.5 ~ 3.6

-1.0 ~ 3.6

-0.5 ~ 3.6

-55 ~ +150

Unit

°C

Note: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.

Functional operation should be restricted to recommended operating condition.

Exposure to higher than recommended voltage for extended periods of time could affect device reliability.

DC OPERATING CONDITIONS

= 0°C to 70°C

Parameter

Supply voltage(for device with a nominal V

of 2.5V)

I/O Supply voltage

I/O Reference voltage

I/O Termination voltage(system)

Input logic high voltage

Input logic low voltage

Input Voltage Level, CK and CK# inputs

Input Differential Voltage, CK and CK# inputs

Input crossing point voltage, CK and CK# inputs

Input leakage current

Output leakage current

Output High Current(Normal strengh driver); V

OUT

= V

+ 0.84V

Output High Current(Normal strengh driver); V

OUT

= V

- 0.84V

Output High Current(Half strengh driver); V

OUT

= V

+ 0.45V

Output High Current(Half strengh driver); V

OUT

= V

- 0.45V

Symbol

CCQ

REF

(DC)

Min

2.3

CCQ

/2-50mV

REF

-0.04

REF

+0.15

-0.3

0.3

1.15

-2

-5

-16.8

16.8

-9

Max

2.7

CCQ

/2+50mV

REF

+0.04

CCQ

+0.3

REF

-0.15

CCQ

+0.3

CCQ

+0.6

1.35

Unit

Note

Notes:

1. Includes ± 25mV margin for DC offset on V

REF

, and a combined total of ± 50mV margin for all AC noise and DC offset on V

REF

, bandwidth limited to 20MHz. The DRAM must

accommodate DRAM current spikes on V

REF

and internal DRAM noise coupled TO V

REF

, both of which may result in V

REF

noise. V

REF

should be de-coupled with an inductance of ≤ 3nH.

2. V

is not applied directly to the device. V

is a system supply for signal termination resistors, is expected to be set equal to V

REF

, and must track variations in the DC level of V

REF

3. V

is the magnitude of the difference between the input level on CK and the input level on CK#.

4. These parameters should be tested at the pin on actual components and may be checked at either the pin or the pad in simulation. The AC and DC input speciﬁcations are relative

to a V

REF

envelop that has been bandwidth limited to 200MHZ.

5. The value of V

is expected to equal 0.5*V

CCQ

of the transmitting device and must track variations in the dc level of the same.

CAPACITANCE

= 2.5, V

CCQ

= 2.5V, T

= 25 C, f = 1MHz

Parameter

Input capacitance (A0 ~ A12, BA0 ~ BA1,RAS#, CAS#, WE#)

Input capacitance (CKE0,CKE1)

Input capacitance ( CS0#, CS1#)

Input capacitance ( CK0, CK0#)

Input capacitance (DM0~DM7)

Data & DQS input/output capacitance (DQ0~DQ63)

April 2005

Rev. 0

Symbol

IN1

IN2

IN3

IN4

IN5

OUT1

Min

Max

Unit

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

White Electronic Designs

0°C ≤ T

≤ +70°C; V

, V

CCQ

= +2.5V ±0.2V

WV3EG232M64EFSU-D4

ADVANCED

SPECIFICATIONS AND CONDITIONS

MAX

PARAMETER/CONDITION

Operating current – One bank Active-Precharge; t

= t

(min); t

= 100Mhz for DDR200,

133Mhz for DDR266A & DDR266B; DQ, DM and DQS inputs changing twice per clock cycle;

address and control inputs changing once per clock cycle

Operating current – One bank operation ; One bank open, BL=4, Reads — Refer to the following

page for detailed test condition

Percharge power-down standby current; All banks idle; power-down mode; CKE ≤ V

(max); t

= 100Mhz for DDR200, 133Mhz for DDR266A & DDR266B; V

= V

REF

for DQ, DQS and DM

Precharge Floating standby current; CS# ≥ V

(min);All banks idle; CKE ≥ V

(min); t

100Mhz for DDR200, 133Mhz for DDR266A & DDR266B; Address and other control inputs

changing once per clock cycle; V

= V

REF

for DQ,DQS and DM

Precharge Quiet standby current; CS# ≥ V

(min); All banks idle; CKE ≥ V

(min); t

= 100Mhz

for DDR200, 133Mhz for DDR266A & DDR266B; Address and other control inputs stable with

keeping ≥ V

(min) or ≤ V

(max); V

= V

REF

for DQ ,DQS and DM

Active power - down standby current ; one bank active; power-down mode; CKE ≤ VIL (max);

= 100Mhz for DDR200, 133Mhz for DDR266A & DDR266B; V

= V

REF

for DQ, DQS and DM

Active standby current; CS# ≥ V

(min); CKE ≥ V

(min); one bank active; active - precharge;

= t

RAS

(max); t

= 100Mhz for DDR200, 133Mhz for DDR266A & DDR266B; DQ, DQS and

DM inputs changing twice per clock cycle; address and other control inputs changing once per

clock cycle

Operating current - burst read; Burst length = 2; reads; continguous burst; One bank active;

address and control inputs changing once per clock cycle; CL = 2 at t

= 100Mhz for DDR200,

CL = 2 at t

= 133Mhz for DDR266A, CL = 2.5 at t

= 133Mhz for DDR266B ; 50% of data

changing at every burst; l

OUT

= 0mA

Operating current - burst write; Burst length = 2; writes; continuous burst; One bank active

address and control inputs changing once per clock cycle; CL = 2 at t

= 100Mhz for DDR200,

CL = 2 at t

= 133Mhz for DDR266A, CL = 2.5 at t

= 133Mhz for DDR266B; DQ, DM and

DQS inputs changing twice per clock cycle, 50% of input data changing at every burst

Auto refresh current; t

= t

RFC

(min) - 8*t

for DDR200 at 100Mhz, 10*t

for DDR266A &

DDR266B at 133Mhz; distributed refresh

Self refresh current; CKE ≤ 0.2V; External clock should be on; t

= 100Mhz for DDR200,

133Mhz for DDR266A & DDR266B

Orerating current - Four bank operation ; Four bank interleaving with BL=4

— Refer to the following page for detailed test condition

SYMBOL

DD0

DDR333

@CL=2.5

1160

DDR266

@CL=2

1000

DDR266

@CL=2.5

1000

UNITS

DD1

DD2P

DD2F

1360

400

1200

320

1200

320

DD2Q

320

290

DD3P

DD3N

560

880

480

720

480

720

DD4R

1720

1480

DD4W

1720

1440

DD5

DD6

DD7A

1800

2680

1640

2360

1640

2360

Note: I

speciﬁcation is based on Samsung components. Other DRAM Manufacturers speciﬁcation may be different.

April 2005

Rev. 0

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

参数对比

与WV3EG232M64EFSU262D4SG相近的元器件有：WV3EG232M64EFSU-D4、WV3EG232M64EFSU335D4MG、WV3EG232M64EFSU262D4MG、WV3EG232M64EFSU265D4MG、WV3EG232M64EFSU335D4SG、WV3EG232M64EFSU265D4SG。描述及对比如下：

型号	WV3EG232M64EFSU262D4SG	WV3EG232M64EFSU-D4	WV3EG232M64EFSU335D4MG	WV3EG232M64EFSU262D4MG	WV3EG232M64EFSU265D4MG	WV3EG232M64EFSU335D4SG	WV3EG232M64EFSU265D4SG
描述	512MB - 2x32Mx64 DDR SDRAM, UNBUFFERED, w/PLL, FBGA	512MB - 2x32Mx64 DDR SDRAM, UNBUFFERED, w/PLL, FBGA	512MB - 2x32Mx64 DDR SDRAM, UNBUFFERED, w/PLL, FBGA	512MB - 2x32Mx64 DDR SDRAM, UNBUFFERED, w/PLL, FBGA	512MB - 2x32Mx64 DDR SDRAM, UNBUFFERED, w/PLL, FBGA	512MB - 2x32Mx64 DDR SDRAM, UNBUFFERED, w/PLL, FBGA	512MB - 2x32Mx64 DDR SDRAM, UNBUFFERED, w/PLL, FBGA
是否Rohs认证	符合	-	符合	符合	符合	符合	符合
厂商名称	White Electronic Designs Corporation	-	White Electronic Designs Corporation	White Electronic Designs Corporation	White Electronic Designs Corporation	White Electronic Designs Corporation	White Electronic Designs Corporation
包装说明	DIMM,	-	DIMM,	DIMM,	DIMM,	DIMM,	DIMM,
Reach Compliance Code	unknow	-	unknow	unknow	unknow	unknow	unknow
访问模式	DUAL BANK PAGE BURST	-	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST
最长访问时间	0.75 ns	-	0.7 ns	0.75 ns	0.75 ns	0.7 ns	0.75 ns
其他特性	AUTO/SELF REFRESH	-	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
JESD-30 代码	R-XZMA-N200	-	R-XZMA-N200	R-XZMA-N200	R-XZMA-N200	R-XZMA-N200	R-XZMA-N200
内存密度	4294967296 bi	-	4294967296 bi	4294967296 bi	4294967296 bi	4294967296 bi	4294967296 bi
内存集成电路类型	DDR DRAM MODULE	-	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE
内存宽度	64	-	64	64	64	64	64
功能数量	1	-	1	1	1	1	1
端口数量	1	-	1	1	1	1	1
端子数量	200	-	200	200	200	200	200
字数	67108864 words	-	67108864 words	67108864 words	67108864 words	67108864 words	67108864 words
字数代码	64000000	-	64000000	64000000	64000000	64000000	64000000
工作模式	SYNCHRONOUS	-	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
最高工作温度	70 °C	-	70 °C	70 °C	70 °C	70 °C	70 °C
组织	64MX64	-	64MX64	64MX64	64MX64	64MX64	64MX64
封装主体材料	UNSPECIFIED	-	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
封装代码	DIMM	-	DIMM	DIMM	DIMM	DIMM	DIMM
封装形状	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	MICROELECTRONIC ASSEMBLY	-	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY
峰值回流温度（摄氏度）	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
认证状态	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
自我刷新	YES	-	YES	YES	YES	YES	YES
最大供电电压 (Vsup)	2.7 V	-	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V
最小供电电压 (Vsup)	2.3 V	-	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V
标称供电电压 (Vsup)	2.5 V	-	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V
表面贴装	NO	-	NO	NO	NO	NO	NO
技术	CMOS	-	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	COMMERCIAL	-	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
端子形式	NO LEAD	-	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD
端子位置	ZIG-ZAG	-	ZIG-ZAG	ZIG-ZAG	ZIG-ZAG	ZIG-ZAG	ZIG-ZAG
处于峰值回流温度下的最长时间	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED