®
X40430, X40431, X40434, X40435
4Kbit EEPROM
Data Sheet
May 24, 2006
FN8251.1
Triple Voltage Monitor with Integrated
CPU Supervisor
FEATURES
• Monitoring voltages: 5V to 9V
• Independent core voltage monitor
• Triple voltage detection and reset assertion
—Standard reset threshold settings. See selec-
tion table on page 2.
—Adjust low voltage reset threshold voltages
using special programming sequence
—Reset signal valid to V
CC
= 1V
—Monitor three separate voltages
• Fault detection register
• Selectable power-on reset timeout
(0.05s, 0.2s, 0.4s, 0.8s)
• Selectable watchdog timer interval
(25ms, 200ms, 1.4s or off)
• Debounced manual reset input
• Low power CMOS
—25µA typical standby current, watchdog on
—6µA typical standby current, watchdog off
• Memory security
• 4Kbits of EEPROM
—16 byte page write mode
—5ms write cycle time (typical)
• Built-in inadvertent write protection
—Power-up/power-down protection circuitry
—Block lock protect 0, or 1/2, of EEPROM
• 400kHz 2-wire interface
• 2.7V to 5.5V power supply operation
• Available packages
—14 Ld SOIC, TSSOP
• Pb-free plus anneal available (RoHS compliant)
APPLICATIONS
• Communication equipment
—Routers, hubs, switches
—Disk arrays, network storage
• Industrial systems
—Process control
—Intelligent instrumentation
• Computer systems
—Computers
—Network servers
DESCRIPTION
The X40430, X40431, X40434, X40435 combines
power-on reset control, watchdog timer, supply voltage
supervision, second and third voltage supervision,
manual reset, and Block Lock
™
protect serial EEPROM
in one package. This combination lowers system cost,
reduces board space requirements, and increases
reliability.
Applying voltage to V
CC
activates the power-on reset
circuit which holds RESET/RESET active for a period of
time. This allows the power supply and system oscilla-
tor to stabilize before the processor can execute code.
Low V
CC
detection circuitry protects the user’s system
from low voltage conditions, resetting the system
when V
CC
falls below the minimum V
TRIP1
point.
RESET/RESET is active until V
CC
returns to proper
operating level and stabilizes. A second and third volt-
age monitor circuit tracks the unregulated supply to
provide a power fail warning or monitors different
power supply voltage. Three common low voltage
combinations are available. However, Intersil’s unique
circuits allows the threshold for either voltage monitor
to be reprogrammed to meet specific system level
requirements or to fine-tune the threshold for applica-
tions requiring higher precision.
A manual reset input provides debounce circuitry for
minimum reset component count.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable
time out interval, the device activates the WDO signal.
The user selects the interval from three preset values.
Once selected, the interval does not change, even
after cycling the power.
The memory portion of the device is a CMOS Serial
EEPROM array with Intersil’s Block Lock protection.
The array is internally organized as x 8. The device
features a 2-wire interface and software protocol
allowing operation on an I
2
C bus.
The device utilizes Intersil’s proprietary Direct Write
™
cell, providing a minimum endurance of 100,000
cycles and a minimum data retention of 100 years.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X40430, X40431, X40434, X40435
BLOCK DIAGRAM
V3MON
+
V3 Monitor
Logic
-
V
TRIP3
V3FAIL
V
CC
or
V2MON*
+
-
V
TRIP2
V2MON
V2 Monitor
Logic
V2FAIL
SDA
WP
Data
Register
Command
Decode Test
& Control
Logic
Fault Detection
Register
Status
Register
EEPROM
Array
Watchdog
and
Reset Logic
WDO
MR
SCL
V
CC
(V1MON)
+
*X40430, X40431=V2MON
X40434, X40435 = V
CC
V
CC
Monitor
Logic
-
V
TRIP1
Power-on,
Manual Reset
Low Voltage
Reset
Generation
RESET
X40430/34
RESET
X40431/35
LOWLINE
Device
Expected System
Voltages
Vtrip1(V)
2.0–4.75*
4.55–4.65*
4.35–4.45*
2.95–3.05*
2.0–4.75*
4.55–4.65*
4.55–4.65*
4.55–4.65*
Vtrip2(V)
1.70–4.75
2.85–2.95
2.55–2.65
2.15–2.25
0.90–3.50*
1.25–1.35*
1.25–1.35*
0.95–1.05*
Vtrip3(V)
1.70–4.75
1.65–1.75
1.65–1.75
1.65–1.75
1.70–4.75
3.05–3.15
2.85–2.95
2.85–2.95
POR
(system)
RESET = X40430
RESET = X40431
RESET = X40434
RESET = X40435
X40430, X40431
-A
5V; 3V or 3.3V; 1.8V
-B
5V; 3V; 1.8V
-C
3.3V; 2.5V; 1.8V
X40434, X40435
-A
5V; 3.3V; 1.5V
-B
5V; 3V or 3.3V; 1.5V
-C
5V; 3 or 3.3V; 1.2V
*Voltage monitor requires Vcc to operate. Others are independent of Vcc.
2
FN8251.1
May 24, 2006
X40430, X40431, X40434, X40435
Ordering Information
PART NUMBER*
PART
MARKING
MONITORED
V
CC
RANGE
V
TRIP1
RANGE
V
TRIP2
RANGE
V
TRIP3
RANGE
TEMP.
RANGE (°C)
PACKAGE
PKG.
DWG. #
PART NUMBER WITH RESET
X40430S14-C
X40430S14I-C
X40430V14-C
X40430V14I-C
X40430S14-B
X40430S14Z-B
(Note)
X40430S14I-B
X40430S14IZ-B
(Note)
X40430V14-B
X40430V14Z-B
(Note)
X40430V14I-B
X40430V14IZ-B
(Note)
X40434S14-C
X40434S14I-C
X40434V14-C
X40434V14I-C
X40434S14-B
X40434S14Z-B
(Note)
X40434S14I-B
X40434S14IZ-B
(Note)
X40434V14-B
X40434V14Z-B
(Note)
X40434V14I-B
X40434V14IZ-B
(Note)
X40434S14-A
X40434S14Z-A
(Note)
X40434S14I-A
X40434S14IZ-A
(Note)
X40430S C
X40430S IC
X4043 0VC
X4043 0VIC
X40430S B
X40430S ZB
X40430S IB
X40430S ZIB
X4043 0VB
X40430V ZB
X4043 0VIB
X40430V ZIB
X40434S C
X40434S IC
X40434V C
X40434V IC
X40434S B
X40434S ZB
X40434S IB
X40434S ZIB
X40434V B
X40434V ZB
X40434V IB
X4043 4V ZIB
X40434S A
X40434S ZA
X40434S IA
X40434S ZIA
1.3 to 5.5
1.3 to 5.5
1.3 to 5.5
1.3 to 5.5
1.3 to 5.5
1.3 to 5.5
1.3 to 5.5
1.3 to 5.5
1.3 to 5.5
1.3 to 5.5
1.3 to 5.5
1.3 to 5.5
3.1V ±50mV
1.3V ±50mV
1.0 to 5.5
4.6V ±50mV
1.0V ±50mV
2.9V ±50mV
1.7 to 5.5
4.4V ±50mV
2.6V ±50mV
1.7 to 3.6
2.9V ±50mV
2.2V ±50mV
1.7V ±50mV
0 to 70
-40 to +85
0 to 70
-40 to +85
0 to 70
0 to 70
-40 to +85
-40 to +85
0 to 70
0 to 70
-40 to +85
-40 to +85
0 to 70
-40 to +85
0 to 70
-40 to +85
0 to 70
0 to 70
-40 to +85
-40 to +85
0 to 70
0 to 70
-40 to +85
-40 to +85
0 to 70
0 to 70
-40 to +85
-40 to +85
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm)
M14.173
M14.173
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm) (Pb-free)
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm) (Pb-free)
M14.173
M14.173
M14.173
M14.173
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm)
M14.173
M14.173
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm) (Pb-free)
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm) (Pb-free)
M14.173
M14.173
M14.173
M14.173
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
3
FN8251.1
May 24, 2006
X40430, X40431, X40434, X40435
Ordering Information
(Continued)
PART NUMBER*
X40434V14-A
X40434V14Z-A
(Note)
X40434V14I-A
X40434V14IZ-A
(Note)
X40430S14-A
X40430S14Z-A
(Note)
X40430S14I-A
X40430S14IZ-A
(Note)
X40430V14-A
X40430V14Z-A
(Note)
X40430V14I-A
PART
MARKING
X40434V A
X40434V ZA
X40434V IA
X40434VZIA
X40430S A
X40430S ZA
X40430S IA
X40430S ZIA
X4043 0VA
X40430V ZA
X4043 0VIA
1.7 to 5.5
2.9V ±50mV
1.7V ±50mV
MONITORED
V
CC
RANGE
1.3 to 5.5
V
TRIP1
RANGE
4.6V ±50mV
V
TRIP2
RANGE
1.3V ±50mV
V
TRIP3
RANGE
3.1V ±50mV
TEMP.
RANGE (°C)
0 to 70
0 to 70
-40 to +85
-40 to +85
0 to 70
0 to 70
-40 to +85
-40 to +85
0 to 70
0 to 70
-40 to +85
-40 to +85
PACKAGE
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm) (Pb-free)
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm) (Pb-free)
PKG.
DWG. #
M14.173
M14.173
M14.173
M14.173
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm) (Pb-free)
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP Tape
and Reel (4.4mm)
(Pb-free)
M14.173
M14.173
M14.173
M14.173
X40430V14IZ-AT1 X4043 0VZIA
(Note)
PART NUMBER WITH RESET
X40431S14-C
X40431S14I-C
X40431V14-C
X40431V14I-C
X40431S14-B
X40431S14Z-B
(Note)
X40431S14I-B
X40431S14IZ-B
(Note)
X40431V14-B
X40431V14Z-B
(Note)
X40431V14I-B
X40431V14IZ-B
(Note)
X40435S14-C
X40435S14I-C
X40435V14-C
X40435V14I-C
X40431S C
X40431S IC
X40431V C
X40431 IC
X40431S B
X40431S ZB
X40431S IB
X40431S ZIB
X40431V B
X40431V ZB
X40431V IB
X40431V ZIB
X40435 C
X40435 IC
X40435 C
X40435 IC
1.0 to 5.5
4.6V ±50mV
1.0V ±50mV
2.9V ±50mV
1.7 to 5.5
4.4V ±50mV
2.6V ±50mV
1.7 to 3.6
2.9V ±50mV
2.2V ±50mV
1.7V ±50mV
0 to 70
-40 to +85
0 to 70
-40 to +85
0 to 70
0 to 70
-40 to +85
-40 to +85
0 to 70
0 to 70
-40 to +85
-40 to +85
0 to 70
-40 to +85
0 to 70
-40 to +85
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm)
M14.173
M14.173
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm) (Pb-free)
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm) (Pb-free)
M14.173
M14.173
M14.173
M14.173
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm)
M14.173
M14.173
4
FN8251.1
May 24, 2006
X40430, X40431, X40434, X40435
Ordering Information
(Continued)
PART NUMBER*
X40435S14-B
X40435S14Z-B
(Note)
X40435S14I-B
X40435S14IZ-B
(Note)
X40435V14-B
X40435V14Z-B
(Note)
X40435V14I-B
X40435V14IZ-B
(Note)
X40435S14-A
X40435S14Z-A
(Note)
X40435S14I-A
X40435S14IZ-A
(Note)
X40435V14-A
X40435V14Z-A
(Note)
X40435V14I-A
X40435V14IZ-A
(Note)
X40431S14-A
X40431S14Z-A
(Note)
X40431S14I-A
X40431S14IZ-A
(Note)
X40431V14-A
X40431V14Z-A
(Note)
X40431V14I-A
X40431V14IZ-A
(Note)
PART
MARKING
X40435 B
X40435S ZB
X40435 IB
X40435S ZIB
X40435 B
X40435V ZB
X40435 IB
X40435V ZIB
X40435 A
X40435S ZA
X40435 IA
X40435S ZIA
X40435 A
X40435V ZA
X40435 IA
X40435V ZIA
X40431S A
X40431S ZA
X40431S IA
X40431S ZIA
X40431V A
X40431V ZA
X40431V IA
X40431V ZIA
1.7 to 5.5
2.9V ±50mV
1.7V ±50mV
3.1V ±50mV
MONITORED
V
CC
RANGE
1.3 to 5.5
V
TRIP1
RANGE
4.6V ±50mV
V
TRIP2
RANGE
1.3V ±50mV
V
TRIP3
RANGE
2.9V ±50mV
TEMP.
RANGE (°C)
0 to 70
0 to 70
-40 to +85
-40 to +85
0 to 70
0 to 70
-40 to +85
-40 to +85
0 to 70
0 to 70
-40 to +85
-40 to +85
0 to 70
0 to 70
-40 to +85
-40 to +85
0 to 70
0 to 70
-40 to +85
-40 to +85
0 to 70
0 to 70
-40 to +85
-40 to +85
PACKAGE
PKG.
DWG. #
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm) (Pb-free)
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm) (Pb-free)
M14.173
M14.173
M14.173
M14.173
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm) (Pb-free)
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm) (Pb-free)
M14.173
M14.173
M14.173
M14.173
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
14 Ld SOIC (150 mil) M14.15
14 Ld SOIC (150 mil) M14.15
(Pb-free)
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm) (Pb-free)
14 Ld TSSOP
(4.4mm)
14 Ld TSSOP
(4.4mm) (Pb-free)
M14.173
M14.173
M14.173
M14.173
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
5
FN8251.1
May 24, 2006
