Dual N-Channel JFET Switch
CORPORATION
U401 – U406
FEATURES
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25
o
C unless otherwise specified)
Gate-Drain or Gate-Source Voltage . . . . . . . . . . . . . . . . . 50V
Gate Current (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
Storage Temperature Range . . . . . . . . . . . . . -65
o
C to +200
o
C
Operating Temperature Range . . . . . . . . . . . -55
o
C to +150
o
C
Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300
o
C
Power Dissipation (T
A
= 85 C)
Derate above 25
o
C
o
•
Minimum System Error and Calibration
•
Low Drift With Temperature
•
Operates From Low Power Supply Voltages
•
High Output Impedance
PIN CONFIGURATION
One Side
300mW
2.6mW/
o
C
Both Sides
500mW
5mW/
o
C
TO-71
NOTE:
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
ORDERING INFORMATION
Part
U401-6
XU401-6
S2
D2
G1
D1
G2
S1
Package
Hermetic TO-71
Sorted Chips in Carriers
Temperature Range
-55
o
C to +150
o
C
-55
o
C to +150
o
C
CJ2
U401 – U406
CORPORATION
ELECTRICAL CHARACTERISTICS
(T
A
= 25
o
C unless otherwise specified)
SYMBOL
PARAMETER
Gate-Source
Breakdown Voltage
Gate Reverse Current
(Note 2)
Gate-Source Cutoff
Voltage
Gate-Source Voltage
(on)
Saturation Drain
Current (Note 3)
Operating Gate
Current (Note 2)
Gate-Gate
Breakdown Voltage
Common-Source
Forward
Transconductance
(Note 3)
Common-Source
Output Conductance
Common-Source
Forward
Transconductance
Common-Source
Output Conductance
Common-Source
Input Capacitance
(Note 6)
Common-Source
Reverse Transfer
Capacitance (Note 6)
Equivalent
Short-Circuit Input
Noise Voltage
Common-Mode
Rejection Ratio
Differential
Gate-Source Voltage
Gate-Source Voltage
Differential Drift (Note
4)
95
5
1000
0.5
-.5
U401
MIN
BV
GSS
I
GSS
V
GS(off)
V
GS(on)
I
DSS
I
G
-50
-25
-2.5
-2.3
10.0
-15
-10
0.5
-.5
MAX
U402
MIN
-50
-25
-2.5
-2.3
10.0
-15
-10
0.5
-.5
MAX
U403
MIN
-50
-25
-2.5
-2.3
10.0
-15
-10
0.5
-.5
MAX
U404
MIN
-50
-25
-2.5
-2.3
10.0
-15
-10
0.5
-.5
MAX
U405
MIN
-50
-25
-2.5
-2.3
10.0
-15
-10
0.5
-.5
MAX
U406
MIN
-50
-25
-2.5
V
-2.3
10.0
-15
-10
mA
pA
nA
V
V
DG
= 15V, I
D
= 200
µ
A
V
DS
= 10V, V
GS
= 0
V
DG
= 15V, I
D
= 200
µ
A
T
A
= 125
o
C
V
DS
= 0, V
GS
= 0,
I
G
=
±
1
µ
A
MAX
V
pA
V
DS
= 0, I
G
= -1
µ
A
V
DS
= 0, V
GS
= -30V
V
DS
= 15V, I
D
= 1nA
UNITS
TEST CONDITIONS
BV
G1-G2
±
50
±
50
±
50
±
50
±
50
±
50
g
fs
2000
7000
2000
7000 2000 7000 2000 7000 2000 7000 2000 7000
V
DS
= 10V,
V
GS
= 0
f = 1kHz
g
os
20
20
20
20
20
20
µ
S
g
fs
2000
1000
2000 1000 2000 1000 2000 1000 2000 1000 2000
f = 1kHz
V
DG
= 15V,
I
D
= 200
µ
A
g
os
2.0
2.0
2.0
2.0
2.0
2.0
C
iss
8.0
8.0
8.0
8.0
8.0
8.0
pF
f = 1MHz
C
rss
3.0
3.0
3.0
3.0
3.0
3.0
e
n
20
20
20
20
20
20
nV
Hz
√
dB
V
DS
= 15V,
V
GS
= 0
f = 10Hz
(Note 6)
CMRR
|
V
GS1
−V
GS2
|
|
∆V
GS1
−V
GS2
|
∆T
95
10
95
10
95
15
90
20
40
V
DG
= 10 to 20V,
I
D
= 200
µ
A (Note 5, 6)
V
DG
= 10V, I
D
= 200
µ
A
T
A
= -55
o
C
T
B
= +25
o
C
T
C
= +125
o
C
mV
10
10
25
25
40
80
V
DG
= 10V,
µ
V/ C
I
D
= 200
µ
A
o
NOTES: 1.
Per transistor.
2.
Approximately doubles for every 10
o
C increase in T
A
.
3.
Pulse test duration = 300µs; duty cycle
≤3%.
4.
Measured at end points T
A
, T
B
, T
C
.
∆
V
DD
5.
CMRR = 20 log
10
,
∆V
DD
= 10V.
∆
| V
GS
1
−V
GS
2
|
6.
For design reference only, not 100% tested.
