历史上的今天
今天是:2025年01月07日(星期二)
2020年01月07日 | 单片机成长之路(51基础篇) - 023 N76e003 系统时钟切换到外部
2020-01-07 来源:eefocus
N76e003切换到外部时钟的资料很少(因为N76e003的片子是不支持无源晶振的,有源晶振的成本又很高,所以网上很少有对N76e003的介绍)。有图有真相:

代码如下:
main.c
1 #include 2 #include 3 #include 4 5 bit BIT_TMP; // 调用 SFR_Macro.h 使用的 6 7 void main(void){ 8 // 开通外部 9 set_EXTEN1; 10 set_EXTEN0; 11 // 等待外部稳定 12 while(!(CKSWT|0x08)); 13 // 选择外部时钟 14 clr_OSC1; 15 set_OSC0; 16 // 等待外部时钟切换成功 17 while(CKEN&0x01); 18 while(1){ 19 ; // 函数主题 20 } 21 } 1 /*-------------------------------------------------------------------------- 2 N76E003.H 3 4 Header file for Nuvoton N76E003 5 --------------------------------------------------------------------------*/ 6 7 #ifndef __N76E885_H__ 8 #define __N76E885_H__ 9 10 sfr P0 = 0x80; 11 sfr SP = 0x81; 12 sfr DPL = 0x82; 13 sfr DPH = 0x83; 14 sfr RWK = 0x86; 15 sfr PCON = 0x87; 16 17 sfr TCON = 0x88; 18 sfr TMOD = 0x89; 19 sfr TL0 = 0x8A; 20 sfr TL1 = 0x8B; 21 sfr TH0 = 0x8C; 22 sfr TH1 = 0x8D; 23 sfr CKCON = 0x8E; 24 sfr WKCON = 0x8F; 25 26 sfr P1 = 0x90; 27 sfr SFRS = 0x91; //TA Protection 28 sfr CAPCON0 = 0x92; 29 sfr CAPCON1 = 0x93; 30 sfr CAPCON2 = 0x94; 31 sfr CKDIV = 0x95; 32 sfr CKSWT = 0x96; //TA Protection 33 sfr CKEN = 0x97; //TA Protection 34 35 sfr SCON = 0x98; 36 sfr SBUF = 0x99; 37 sfr SBUF_1 = 0x9A; 38 sfr EIE = 0x9B; 39 sfr EIE1 = 0x9C; 40 sfr CHPCON = 0x9F; //TA Protection 41 42 sfr P2 = 0xA0; 43 sfr AUXR1 = 0xA2; 44 sfr BODCON0 = 0xA3; //TA Protection 45 sfr IAPTRG = 0xA4; //TA Protection 46 sfr IAPUEN = 0xA5; //TA Protection 47 sfr IAPAL = 0xA6; 48 sfr IAPAH = 0xA7; 49 50 sfr IE = 0xA8; 51 sfr SADDR = 0xA9; 52 sfr WDCON = 0xAA; //TA Protection 53 sfr BODCON1 = 0xAB; //TA Protection 54 sfr P3M1 = 0xAC; 55 sfr P3S = 0xAC; //Page1 56 sfr P3M2 = 0xAD; 57 sfr P3SR = 0xAD; //Page1 58 sfr IAPFD = 0xAE; 59 sfr IAPCN = 0xAF; 60 61 sfr P3 = 0xB0; 62 sfr P0M1 = 0xB1; 63 sfr P0S = 0xB1; //Page1 64 sfr P0M2 = 0xB2; 65 sfr P0SR = 0xB2; //Page1 66 sfr P1M1 = 0xB3; 67 sfr P1S = 0xB3; //Page1 68 sfr P1M2 = 0xB4; 69 sfr P1SR = 0xB4; //Page1 70 sfr P2S = 0xB5; 71 sfr IPH = 0xB7; 72 sfr PWMINTC = 0xB7; //Page1 73 74 sfr IP = 0xB8; 75 sfr SADEN = 0xB9; 76 sfr SADEN_1 = 0xBA; 77 sfr SADDR_1 = 0xBB; 78 sfr I2DAT = 0xBC; 79 sfr I2STAT = 0xBD; 80 sfr I2CLK = 0xBE; 81 sfr I2TOC = 0xBF; 82 83 sfr I2CON = 0xC0; 84 sfr I2ADDR = 0xC1; 85 sfr ADCRL = 0xC2; 86 sfr ADCRH = 0xC3; 87 sfr T3CON = 0xC4; 88 sfr PWM4H = 0xC4; //Page1 89 sfr RL3 = 0xC5; 90 sfr PWM5H = 0xC5; //Page1 91 sfr RH3 = 0xC6; 92 sfr PIOCON1 = 0xC6; //Page1 93 sfr TA = 0xC7; 94 95 sfr T2CON = 0xC8; 96 sfr T2MOD = 0xC9; 97 sfr RCMP2L = 0xCA; 98 sfr RCMP2H = 0xCB; 99 sfr TL2 = 0xCC; 100 sfr PWM4L = 0xCC; //Page1 101 sfr TH2 = 0xCD; 102 sfr PWM5L = 0xCD; //Page1 103 sfr ADCMPL = 0xCE; 104 sfr ADCMPH = 0xCF; 105 106 sfr PSW = 0xD0; 107 sfr PWMPH = 0xD1; 108 sfr PWM0H = 0xD2; 109 sfr PWM1H = 0xD3; 110 sfr PWM2H = 0xD4; 111 sfr PWM3H = 0xD5; 112 sfr PNP = 0xD6; 113 sfr FBD = 0xD7; 114 115 sfr PWMCON0 = 0xD8; 116 sfr PWMPL = 0xD9; 117 sfr PWM0L = 0xDA; 118 sfr PWM1L = 0xDB; 119 sfr PWM2L = 0xDC; 120 sfr PWM3L = 0xDD; 121 sfr PIOCON0 = 0xDE; 122 sfr PWMCON1 = 0xDF; 123 124 sfr ACC = 0xE0; 125 sfr ADCCON1 = 0xE1; 126 sfr ADCCON2 = 0xE2; 127 sfr ADCDLY = 0xE3; 128 sfr C0L = 0xE4; 129 sfr C0H = 0xE5; 130 sfr C1L = 0xE6; 131 sfr C1H = 0xE7; 132 133 sfr ADCCON0 = 0xE8; 134 sfr PICON = 0xE9; 135 sfr PINEN = 0xEA; 136 sfr PIPEN = 0xEB; 137 sfr PIF = 0xEC; 138 sfr C2L = 0xED; 139 sfr C2H = 0xEE; 140 sfr EIP = 0xEF; 141 142 sfr B = 0xF0; 143 sfr CAPCON3 = 0xF1; 144 sfr CAPCON4 = 0xF2; 145 sfr SPCR = 0xF3; 146 sfr SPCR2 = 0xF3; //Page1 147 sfr SPSR = 0xF4; 148 sfr SPDR = 0xF5; 149 sfr AINDIDS = 0xF6; 150 sfr EIPH = 0xF7; 151 152 sfr SCON_1 = 0xF8; 153 sfr PDTEN = 0xF9; //TA Protection 154 sfr PDTCNT = 0xFA; //TA Protection 155 sfr PMEN = 0xFB; 156 sfr PMD = 0xFC; 157 sfr EIP1 = 0xFE; 158 sfr EIPH1 = 0xFF; 159 160 /* BIT Registers */ 161 /* SCON_1 */ 162 sbit SM0_1 = SCON_1^7; 163 sbit FE_1 = SCON_1^7; 164 sbit SM1_1 = SCON_1^6; 165 sbit SM2_1 = SCON_1^5; 166 sbit REN_1 = SCON_1^4; 167 sbit TB8_1 = SCON_1^3; 168 sbit RB8_1 = SCON_1^2; 169 sbit TI_1 = SCON_1^1; 170 sbit RI_1 = SCON_1^0; 171 172 /* ADCCON0 */ 173 sbit ADCF = ADCCON0^7; 174 sbit ADCS = ADCCON0^6; 175 sbit ETGSEL1 = ADCCON0^5; 176 sbit ETGSEL0 = ADCCON0^4; 177 sbit ADCHS3 = ADCCON0^3; 178 sbit ADCHS2 = ADCCON0^2; 179 sbit ADCHS1 = ADCCON0^1; 180 sbit ADCHS0 = ADCCON0^0; 181 182 /* PWMCON0 */ 183 sbit PWMRUN = PWMCON0^7; 184 sbit LOAD = PWMCON0^6; 185 sbit PWMF = PWMCON0^5; 186 sbit CLRPWM = PWMCON0^4; 187 188 189 /* PSW */ 190 sbit CY = PSW^7; 191 sbit AC = PSW^6; 192 sbit F0 = PSW^5; 193 sbit RS1 = PSW^4; 194 sbit RS0 = PSW^3; 195 sbit OV = PSW^2;
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