2021年09月24日 | s3c2440时钟+nandflash拷贝至SDRAM+开启mmu

涉及6个文件

head.S,init.c,main.c,makefile,nand.c,out.lds

head.S

.text

.global _start

_start:

    b   Reset

HandleUndef:

    b   HandleUndef 

HandleSWI:

    b   HandleSWI

HandlePrefetchAbort:

    b   HandlePrefetchAbort

HandleDataAbort:

    b   HandleDataAbort

HandleNotUsed:

    b   HandleNotUsed

    b   HandleIRQ

HandleFIQ:

    b   HandleFIQ

Reset:

ldr r0, =0x53000000

mov r1, #0x0

str r1, [r0] @disable watchdog

msr cpsr_c, #0xd2 @IRQ mode,ARM mode,IRQ disable

ldr sp, =3072 

msr cpsr_c, #0xd3 @Supervisor mode,ARM mode,IRQ disable

ldr sp, =1024*4 @set up stack,4K

msr cpsr_c, #0x53 @Supervisor mode,ARM mode,IRQ enable

ldr sp, =4096

bl clock_init

bl memsetup

bl nand_init

       ldr r0, =0x30000000 @target address(sdram),nand_read 1parameter

       mov r1, #4096 @start address,nand_read 2parameter

       mov r2, #2048*2 @size copy to sdram,nand_read 3parameter

bl nand_read

bl  create_page_table

bl  mmu_init 

ldr sp, =0xB4000000 @pstack go to sdram

ldr lr, =halt_loop

ldr pc, =main

halt_loop:

b halt_loop

HandleIRQ:

sub lr, lr, #4

stmdb sp!, {r0-r12,lr}   

ldr lr, =int_return             

ldr pc, =TIMER_Handle            

int_return:

ldmia sp!, { r0-r12,pc }^

init.c

#define BWSCON (*(volatile unsigned long *)0x48000000)  

#define BANKCON0 (*(volatile unsigned long *)0x48000004)

#define BANKCON1 (*(volatile unsigned long *)0x48000008)

#define BANKCON2 (*(volatile unsigned long *)0x4800000C)

#define BANKCON3 (*(volatile unsigned long *)0x48000010)

#define BANKCON4 (*(volatile unsigned long *)0x48000014)

#define BANKCON5    (*(volatile unsigned long *)0x48000018)

#define BANKCON6    (*(volatile unsigned long *)0x4800001C)

#define BANKCON7    (*(volatile unsigned long *)0x48000020)

#define REFRESH       (*(volatile unsigned long *)0x48000024)

#define BANKSIZE     (*(volatile unsigned long *)0x48000028)

#define MRSRB6 (*(volatile unsigned long *)0x4800002C)

#define MRSRB7 (*(volatile unsigned long *)0x48000030)

#define CLKDIVN (*(volatile unsigned long *)0x4C000014)

#define MPLLCON (*(volatile unsigned long *)0x4C000004)

#define S3C2440_MPLL_400MHZ 0x5C011

void memsetup()

{

BWSCON=0x22011110;

BANKCON0=0x00000700;//sram

BANKCON1=0x00000700;//rom

BANKCON2=0x00000700;

BANKCON3=0x00000700;

BANKCON4=0x00000700;

BANKCON5=0x00000700;

BANKCON6=0x00018005;//sdram

BANKCON7=0x00018005;

REFRESH=0x008C04F4;

BANKSIZE=0x000000B1;

MRSRB6=0x00000030;

MRSRB7=0x00000030;

}

void clock_init()

{

CLKDIVN=0x05;

__asm__(

    "mrc    p15, 0, r1, c1, c0, 0n"

    "orr    r1, r1, #0xc0000000n"

    "mcr    p15, 0, r1, c1, c0, 0n" 

    );

      MPLLCON=S3C2440_MPLL_400MHZ;

}

void create_page_table(void)

{

#define MMU_FULL_ACCESS     (3 << 10) 

#define MMU_DOMAIN          (0 << 5)

#define MMU_SPECIAL         (1 << 4)  

#define MMU_CACHEABLE       (1 << 3) 

#define MMU_BUFFERABLE      (1 << 2) 

#define MMU_SECTION         (2)     

#define MMU_SECDESC         (MMU_FULL_ACCESS | MMU_DOMAIN | MMU_SPECIAL | MMU_SECTION)

#define MMU_SECDESC_WB      (MMU_FULL_ACCESS | MMU_DOMAIN | MMU_SPECIAL |

                             MMU_CACHEABLE | MMU_BUFFERABLE | MMU_SECTION)

#define MMU_SECTION_SIZE    0x00100000

    unsigned long virtuladdr, physicaladdr;

    unsigned long *mmu_tlb_base = (unsigned long *)0x30000000;

    virtuladdr = 0;

    physicaladdr = 0;

    *(mmu_tlb_base + (virtuladdr >> 20)) = (physicaladdr & 0xFFF00000) | MMU_SECDESC_WB;//0~4096 the same

    virtuladdr = 0x56000000;

    physicaladdr = 0x56000000;

    *(mmu_tlb_base + (virtuladdr >> 20)) = (physicaladdr & 0xFFF00000) | MMU_SECDESC;

    virtuladdr = 0x4A000000;

    physicaladdr = 0x4A000000;

    *(mmu_tlb_base + (virtuladdr >> 20)) = (physicaladdr & 0xFFF00000) | MMU_SECDESC;

    virtuladdr = 0x51000000;

    physicaladdr = 0x51000000;

    *(mmu_tlb_base + (virtuladdr >> 20)) = (physicaladdr & 0xFFF00000) | MMU_SECDESC;

    /*SDRAM to 0xB0000000~0xB4000000*/

    virtuladdr = 0xB0000000;

    physicaladdr = 0x30000000;

    while (virtuladdr < 0xB4000000)

    {

        *(mmu_tlb_base + (virtuladdr >> 20)) = (physicaladdr & 0xFFF00000) | MMU_SECDESC_WB;

        virtuladdr += 0x100000;

        physicaladdr += 0x100000;

    }

}

/*

 * 启动MMU

 */

void mmu_init(void)

{

    unsigned long ttb = 0x30000000;

__asm__(

    "mov    r0, #0n"

    "mcr    p15, 0, r0, c7, c7, 0n"  

    "mcr    p15, 0, r0, c7, c10, 4n"

    "mcr    p15, 0, r0, c8, c7, 0n"  

    "mov    r4, %0n"              

    "mcr    p15, 0, r4, c2, c0, 0n"  

    "mvn    r0, #0n"                   

    "mcr    p15, 0, r0, c3, c0, 0n"   

    "mrc    p15, 0, r0, c1, c0, 0n" 

    "bic    r0, r0, #0x3000n"   

    "bic    r0, r0, #0x0300n"  

    "bic    r0, r0, #0x0087n" 

    "orr    r0, r0, #0x0002n" 

    "orr    r0, r0, #0x0004n"

    "orr    r0, r0, #0x1000n" 

    "orr    r0, r0, #0x0001n" 

    "mcr    p15, 0, r0, c1, c0, 0n"  

    :

    : "r" (ttb) );

}

main.c

/*

led1 f4,led2 f5,led3 f6,int0 f0

*/

#define GPFCON (*(volatile unsigned long *)0x56000050)

#define GPFDAT (*(volatile unsigned long *)0x56000054)

#define GPF4_OUT (1<<(4*2))

#define GPF5_OUT (1<<(5*2))

#define GPF6_OUT (1<<(6*2))

#define GPF4_CON_MSK (3<<(4*2))

#define GPF5_CON_MSK (3<<(5*2))

#define GPF6_CON_MSK (3<<(6*2))

#define GPF4_DAT_MSK (1<<(4))

#define GPF5_DAT_MSK (1<<(5))

#define GPF6_DAT_MSK (1<<(6))

#define TIMER0_MSK (1<<(10))

#define TCFG0 (*(volatile unsigned long *)0x51000000)

#define TCON (*(volatile unsigned long *)0x51000008)

#define TCNTB0 (*(volatile unsigned long *)0x5100000C)

#define INTOFFSET (*(volatile unsigned long *)0x4A000014)

#define SRCPND (*(volatile unsigned long *)0X4A000000)

#define INTMSK (*(volatile unsigned long *)0X4A000008)

#define PRIORITY (*(volatile unsigned long *)0x4A00000C)

#define INTPND (*(volatile unsigned long *)0X4A000010)

void init_timer0()

{

SRCPND=0x0;

INTMSK=~TIMER0_MSK;

TCFG0=0xff;

TCNTB0=0xffff;

TCON=0xa;

TCON=0x9;

}

void led_set_out()

{

GPFCON&=~(GPF4_CON_MSK|GPF5_CON_MSK|GPF6_CON_MSK);

    GPFCON|=GPF4_OUT|GPF5_OUT|GPF6_OUT;

GPFDAT&=~(GPF4_DAT_MSK);

GPFDAT&=~(GPF5_DAT_MSK);

GPFDAT&=~(GPF6_DAT_MSK);

GPFDAT|=(1<<4);

GPFDAT|=(1<<5);

GPFDAT|=(1<<6);

}

void led_reset(int ledn)

{

if(ledn==1)

{

GPFDAT|=(1<<4);

}

else if(ledn==2)

{

GPFDAT|=(1<<5);

}

else

{

GPFDAT|=(1<<6);

}

}

void led_set(int ledn)

{

if(ledn==1)

{

GPFDAT&=~(GPF4_DAT_MSK);

}

else if(ledn==2)

{

GPFDAT&=~(GPF5_DAT_MSK);

}

else

{

GPFDAT&=~(GPF6_DAT_MSK);

}

}

void TIMER_Handle()

{

int i;

led_set(1);

for(i=0;i<1000000;i++);

led_reset(1);

SRCPND=1< INTPND=1<}

int main()

{

int i;

led_set_out();

init_timer0();

while(1)

{

led_reset(2);

for(i=0;i<10000000;i++);

led_set(2);

for(i=0;i<10000000;i++);

}

return 0;

}

makefile

out.bin : head.S  main.c nand.c init.c

arm-linux-gcc -c -o head.o head.S

arm-linux-gcc -c -o main.o main.c

arm-linux-gcc -c -o nand.o nand.c

arm-linux-gcc -c -o init.o init.c

arm-linux-ld -Tout.lds head.o main.o nand.o init.o -o out_elf

arm-linux-objcopy -O binary -S out_elf out.bin

arm-linux-objdump -D -m arm  out_elf > out.dis

#rm -f out.dis out_elf *.o

clean:

rm -f out.dis out.bin out_elf *.o

nand.c

#define LARGER_NAND_PAGE

#define GSTATUS1        (*(volatile unsigned int *)0x560000B0)

#define BUSY            1

#define NAND_SECTOR_SIZE    512

#define NAND_BLOCK_MASK     (NAND_SECTOR_SIZE - 1)

#define NAND_SECTOR_SIZE_LP    2048

#define NAND_BLOCK_MASK_LP     (NAND_SECTOR_SIZE_LP - 1)

typedef unsigned int S3C24X0_REG32;

/* NAND FLASH (see S3C2410 manual chapter 6) */

typedef struct {

    S3C24X0_REG32   NFCONF;

    S3C24X0_REG32   NFCMD;

    S3C24X0_REG32   NFADDR;

    S3C24X0_REG32   NFDATA;

    S3C24X0_REG32   NFSTAT;

    S3C24X0_REG32   NFECC;

} S3C2410_NAND;

/* NAND FLASH (see S3C2440 manual chapter 6, www.100ask.net) */

typedef struct {

    S3C24X0_REG32   NFCONF;