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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SK3902
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
The 2SK3902 is N-channel MOS Field Effect Transistor
designed for high current switching applications.
ORDERING INFORMATION
PART NUMBER
2SK3902-ZK
PACKAGE
TO-263 (MP-25ZK)
FEATURES
•
Super low On-state resistance
R
DS(on)1
= 21 mΩ MAX. (V
GS
= 10 V, I
D
= 15 A)
R
DS(on)2
= 26 mΩ MAX. (V
GS
= 4.5 V, I
D
= 15 A)
•
Low C
iss
: C
iss
= 1200 pF TYP.
•
Built-in gate protection diode
(TO-263)
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Drain to Source Voltage (V
GS
= 0 V)
Gate to Source Voltage (V
DS
= 0 V)
Drain Current (DC) (T
C
= 25°C)
Drain Current (pulse)
Note1
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T1
P
T2
T
ch
T
stg
60
±20
±30
±90
45
1.5
150
−55
to +150
40
20
40
V
V
A
A
W
W
°C
°C
mJ
A
mJ
Total Power Dissipation (T
C
= 25°C)
Total Power Dissipation (T
A
= 25°C)
Channel Temperature
Storage Temperature
Single Avalanche Energy
Note2
Note3
Note3
E
AS
I
AR
E
AR
Repetitive Avalanche Current
Repetitive Avalanche Energy
Notes 1.
PW
≤
10
µ
s, Duty Cycle
≤
1%
2.
Starting T
ch
= 25°C, V
DD
= 30 V, R
G
= 25
Ω,
V
GS
= 20
→
0 V, L = 100
µ
H
3.
R
G
= 25
Ω,
T
ch(peak)
≤
150°C
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. D17177EJ1V0DS00 (1st edition)
Date Published May 2004 NS CP(K)
Printed in Japan
2004
2SK3902
ELECTRICAL CHARACTERISTICS (T
A
= 25°C)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate Cut-off Voltage
Forward Transfer Admittance
Note
Note
SYMBOL
I
DSS
I
GSS
V
GS(off)
| y
fs
|
R
DS(on)1
R
DS(on)2
TEST CONDITIONS
V
DS
= 60 V, V
GS
= 0 V
V
GS
=
±20
V, V
DS
= 0 V
V
DS
= 10 V, I
D
= 1 mA
V
DS
= 10 V, I
D
= 15 A
V
GS
= 10 V, I
D
= 15 A
V
GS
= 4.5 V, I
D
= 15 A
V
DS
= 10 V
V
GS
= 0 V
f = 1 MHz
V
DD
= 30 V, I
D
= 15 A
V
GS
= 10 V
R
G
= 0
Ω
MIN.
TYP.
MAX.
10
±10
UNIT
µ
A
µ
A
V
S
1.5
9.5
2.0
19
16.8
19.5
1200
250
85
10
4
37
4
2.5
Drain to Source On-state Resistance
21
26
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Note
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
G
Q
GS
Q
GD
V
F(S-D)
t
rr
Q
rr
V
DD
= 48 V
V
GS
= 10 V
I
D
= 30 A
I
F
= 30 A, V
GS
= 0 V
I
F
= 30 A, V
GS
= 0 V
di/dt = 100 A/
µ
s
25
4.5
6.0
0.92
31
34
1.5
V
ns
nC
Note
Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
R
G
= 25
Ω
PG.
V
GS
= 20
→
0 V
50
Ω
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
V
DD
PG.
R
G
R
L
V
DD
V
GS
V
GS
Wave Form
0
10%
V
GS
90%
V
DS
90%
90%
10%
10%
BV
DSS
I
AS
I
D
V
DD
V
DS
V
GS
0
τ
τ
= 1
µ
s
Duty Cycle
≤
1%
V
DS
V
DS
Wave Form
0
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
Starting T
ch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
I
G
= 2 mA
PG.
50
Ω
R
L
V
DD
2
Data Sheet D17177EJ1V0DS
2SK3902
TYPICAL CHARACTERISTICS (T
A
= 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
dT - Percentage of Rated Power - %
120
100
80
60
40
20
0
0
25
50
75
100
125
150
175
60
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
P
T
- Total Power Dissipation - W
50
40
30
20
10
0
0
25
50
75
100
125
150
175
T
C
- Case Temperature -
°C
FORWARD BIAS SAFE OPERATING AREA
1000
T
C
- Case Temperature -
°C
I
D
- Drain Current - A
100
R
DS(on)
Limited
(at V
GS
= 10 V)
I
D(pulse)
= 90 A
100
µs
10
I
D(DC)
= 30 A
Power Dissipation Limited
1 ms
1
T
C
= 25°C
Single pulse
10 ms
0.1
0.1
1
10
100
V
DS
- Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
r
th(t)
- Transient Thermal Resistance -
°C/W
100
R
th(ch-A)
= 83.3°C/W
10
R
th(ch-C)
= 2.78°C/W
1
Single pulse
0.1
100
µ
1m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
Data Sheet D17177EJ1V0DS
3
DSP 与 ARM 处理器
