INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
•
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT253
Dual 4-input multiplexer; 3-state
Product specification
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
FEATURES
•
Non-inverting data path
•
3-state outputs for bus interface
•
and multiplex expansion
•
Common select inputs
•
Separate output enable inputs
•
Output capability: bus driver
•
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT253 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
74HC/HCT253
The 74HC/HCT253 have two identical 4-input multiplexers
with 3-state outputs which select two bits from four sources
selected by common data select inputs (S
0
, S
1
).
When the individual output enable (1OE, 2OE) inputs of
the 4-input multiplexers are HIGH, the outputs are forced
to the high impedance OFF-state. The “253” is the logic
implementation of a 2-pole, 4-position switch, where the
position of the switch is determined by the logic levels
applied to S
0
and S
1
.
The logic equations for the outputs are:
1Y = 1OE(1l
0
.S
1
.S
0
+1I
1
.S
1
.S
0
+1I
2
.S
1
.S
0
+1I
3
.S
1
.S
0
)
2Y = 2OE(2l
0
.S
1
.S
0
+2I
1
.S
1
.S
0
+2I
2
.S
1
.S
0
+2I
3
.S
1
.S
0
)
APPLICATIONS
•
Data selectors
•
Data multiplexers
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
TYPICAL
SYMBOL
t
PHL
/ t
PLH
PARAMETER
propagation delay
1I
n
, 2I
n
to nY;
S
n
to nY
C
I
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
−
1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
input capacitance
power dissipation capacitance per multiplexer
notes 1 and 2
CONDITIONS
HC
C
L
= 15 pF; V
CC
= 5 V
17
18
3.5
55
17
19
3.5
55
ns
ns
pF
pF
HCT
UNIT
December 1990
2
Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
PIN DESCRIPTION
PIN NO.
1, 15
14, 2
7, 9
8
6, 5, 4, 3
10, 11, 12, 13
16
SYMBOL
1OE, 2OE
S
0
, S
1
1Y, 2Y
GND
1I
0
to 1I
3
2I
0
to 2I
3
V
CC
NAME AND FUNCTION
output enable inputs (active LOW)
common data select inputs
3-state multiplexer outputs
ground (0 V)
data inputs from source 1
data inputs from source 2
positive supply voltage
74HC/HCT253
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
74HC/HCT253
Fig.4 Functional diagram.
Fig.5 Logic diagram.
FUNCTION TABLE
SELECT INPUTS
S
0
X
L
L
H
H
L
L
H
H
NOTES
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
S
1
X
L
L
L
L
H
H
H
H
nI
0
X
L
H
X
X
X
X
X
X
DATA INPUTS
nI
1
X
X
X
L
H
X
X
X
X
nI
2
X
X
X
X
X
L
H
X
X
nI
3
X
X
X
X
X
X
X
L
H
OUTPUT ENABLE
nOE
H
L
L
L
L
L
L
L
L
OUTPUT
nY
Z
L
H
L
H
L
H
L
H
December 1990
4
Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
I
CC
category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
T
amb
(°C)
74HC
SYMBOL PARAMETER
+25
−40
to
+85
−40
to
+125
UNIT
74HC/HCT253
TEST CONDITIONS
V
CC
(V)
WAVEFORMS
min. typ. max. min. max. min. max.
t
PHL
/ t
PLH
propagation delay
1I
n
to nY;
2I
n
to nY
propagation delay
S
n
to nY
3-state output enable time
nOE to nY
3-state output disable time
nOE to nY
output transition time
55
20
16
58
21
17
30
11
9
41
15
12
14
5
4
175
35
30
175
35
30
100
20
17
150
30
26
60
12
10
220
44
37
220
44
37
125
25
21
190
38
33
75
15
13
265
53
45
265
53
45
150
30
26
225
45
38
90
18
15
ns
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
Fig.6
t
PHL
/ t
PLH
ns
Fig.6
t
PZH
/ t
PZL
ns
Fig.7
t
PHZ
/ t
PLZ
ns
Fig.7
t
THL
/ t
TLH
ns
Fig.6
December 1990
5
stm32/stm8
