Data Sheet
FEATURES
Fast throughput rate: 1 MSPS
Specified for V
DD
of 2.7 V to 5.25 V
Low power
4.5 mW max at 1 MSPS with 3 V supplies
10.5 mW max at 1 MSPS with 5 V supplies
Wide input bandwidth: 68 dB SNR at 300 kHz input frequency
Flexible power/serial clock speed management
No pipeline delays
High speed serial interface
SPI-/QSPI™-/MICROWIRE-/DSP-compatible
On-board reference: 2.5 V (AD7495 only)
Standby mode: 1 μA max
8-lead MSOP and SOIC packages
V
DD
1 MSPS,12-Bit ADCs
AD7475/AD7495
FUNCTIONAL BLOCK DIAGRAM
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
V
IN
REF IN
T/H
SCLK
CONTROL
LOGIC
SDATA
CS
AD7475
GND
V
DD
V
DRIVE
V
IN
T/H
APPLICATIONS
Battery-powered systems
Personal digital assistants
Medical instruments
Mobile communications
Instrumentation and control systems
Data acquisition systems
Optical sensors
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
REF OUT
BUF
SCLK
2.5V
REFERENCE
CONTROL
LOGIC
SDATA
CS
V
DRIVE
01684-B-001
AD7495
GND
Figure 1.
GENERAL DESCRIPTION
The
AD7475/AD7495
1
are 12-bit, high speed, low power,
successive-approximation ADCs that operate from a single
2.7 V to 5.25 V power supply with throughput rates up to 1 MSPS.
They contain a low noise, wide bandwidth track-and-hold
amplifier that can handle input frequencies above 1 MHz.
The conversion process and data acquisition are controlled
using CS and the serial clock, allowing the devices to interface
with microprocessors or DSPs. The input signal is sampled on
the falling edge of CS and conversion is initiated at this point.
The conversion time is determined by the SCLK frequency.
There are no pipeline delays associated with the device.
The
AD7475/AD7495
use advanced design techniques to
achieve very low power dissipation at high throughput rates.
With 3 V supplies and a 1 MSPS throughput rate, the
AD7475
consumes just 1.5 mA, while the
AD7495
consumes 2 mA. With
5 V supplies and 1 MSPS, the current consumption is 2.1 mA
for the
AD7475
and 2.6 mA for the
AD7495.
The analog input range for the devices is 0 V to REF IN. The
2.5 V reference for the
AD7475
is applied externally to the REF IN
pin, while the
AD7495
has an on-board 2.5 V reference.
1
PRODUCT HIGHLIGHTS
1.
2.
The
AD7475
offers 1 MSPS throughput rates with 4.5 mW
power consumption.
Single-supply operation with V
DRIVE
function. The
AD7475/AD7495
operate from a single 2.7 V to 5.25 V
supply. The V
DRIVE
function allows the serial interface to
connect directly to either 3 V or 5 V processor systems
independent of V
DD
.
Flexible power/serial clock speed management. The
conversion rate is determined by the serial clock, allowing
the conversion time to be reduced through the serial clock
speed increase. The devices also feature shutdown modes
to maximize power efficiency at lower throughput rates.
This allows the average power consumption to reduce while
not converting. Power consumption is 1 μA when in full
shutdown.
No pipeline delay. The devices feature a standard successive
approximation ADC with accurate control of the sampling
instant via a CS input and once-off conversion control.
3.
4.
Protected by U.S. Patent No. 6,681,332
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Rev. C
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AD7475/AD7495
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
AD7475 Specifications ..................................................................... 3
AD7495 Specifications ..................................................................... 5
Timing Specifications....................................................................... 7
Timing Example 1 ........................................................................ 8
Timing Example 2 ........................................................................ 8
Absolute Maximum Ratings ............................................................ 9
ESD Caution .................................................................................. 9
Pin Configurations and Function Descriptions ......................... 10
Terminology .................................................................................... 11
Typical Performance Characteristics ........................................... 12
Theory of Operation ...................................................................... 13
Data Sheet
Converter Operation.................................................................. 13
ADC Transfer Function ............................................................. 13
Typical Connection Diagram ................................................... 14
Operating Modes ............................................................................ 16
Normal Mode .............................................................................. 16
Partial Power-Down Mode ....................................................... 16
Full Power-Down Mode ............................................................ 17
Power vs. Throughput Rate ....................................................... 19
Serial Interface ................................................................................ 20
Microprocessor Interfacing ........................................................... 21
AD7475/AD7495 to TMS320C5
X
/C54
X
................................. 21
AD7475/AD7495 to ADSP-21xx.............................................. 21
AD7475/AD7495 to DSP56
XXX
............................................... 22
AD7475/AD7495 to MC68HC16............................................. 22
Outline Dimensions ....................................................................... 23
Ordering Guide .......................................................................... 24
REVISION HISTORY
7/15—Rev. B to Rev. C
Changes to Ordering Guide .......................................................... 24
5/05—Rev. A to Rev. B
Updated Format .................................................................. Universal
Added Patent Information............................................................... 1
Updated Outline Dimensions ....................................................... 23
Changes to Ordering Guide .......................................................... 24
Rev. C | Page 2 of 24
Data Sheet
AD7475
SPECIFICATIONS
AD7475/AD7495
V
DD
= 2.7 V to 5.25 V, V
DRIVE
= 2.7 V to 5.25 V, REF IN = 2.5 V, f
SCLK
= 20 MHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
Signal-to-Noise and Distortion
Ratio (SINAD)
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise
(SFDR)
Intermodulation Distortion (IMD)
Second-Order Terms
Third-Order Terms
Aperture Delay
Aperture Jitter
Full Power Bandwidth
Full Power Bandwidth
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
A Version
1
68
−75
−76
B Version
1
68
−75
−76
Unit
dB min
dB max
dB max
Test Conditions/Comments
f
IN
= 300 kHz sine wave, f
SAMPLE
= 1 MSPS
f
IN
= 300 kHz sine wave, f
SAMPLE
= 1 MSPS
f
IN
= 300 kHz sine wave, f
SAMPLE
= 1 MSPS
−78
−78
10
50
8.3
1.3
12
±1.5
±0.5
+1.5/−0.9
±0.5
±8
±3
0 to REF IN
±1
20
2.5
±1
20
−78
−78
10
50
8.3
1.3
12
±1
±0.5
+1.5/−0.9
±0.5
±8
±3
0 to REF IN
±1
20
2.5
±1
20
V
DRIVE
− 1
0.4
±1
10
V
DRIVE
− 0.2
0.4
±10
10
dB typ
dB typ
ns typ
ps typ
MHz typ
MHz typ
Bits
LSB max
LSB typ
LSB max
LSB typ
LSB max
LSB max
V
µA max
pF typ
V
µA max
pF typ
V min
V max
µA max
pF max
V min
V max
µA max
pF max
@ 3 dB
@ 0.1 dB
Offset Error
Gain Error
ANALOG INPUT
Input Voltage Ranges
DC Leakage Current
Input Capacitance
REFERENCE INPUT
REF IN Input Voltage Range
DC Leakage Current
Input Capacitance
LOGIC INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN 2
LOGIC OUTPUTS
Output High Voltage, V
OH
Output Low Voltage, V
OL
Floating-State Leakage Current
Floating-State Output
Capacitance
2
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time
Throughput Rate
@ 5 V (typ @ 3 V)
@ 25°C
@ 5 V guaranteed no missed codes to
12 bits (typ @ 3 V)
@ 25°C
Typically ±2.5 LSB
±1% for specified performance
0.4
±1
10
Typically 10 nA, V
IN
= 0 V or V
DRIVE
0.4
±10
10
I
SOURCE
= 200 µA; V
DRIVE
= 2.7 V to 5.25 V
I
SINK
= 200 µA
Straight (Natural) Binary
800
300
325
1
800
300
325
1
ns max
ns max
ns max
MSPS max
16 SCLK cycles with SCLK at 20 MHz
Sine wave input
Full-scale step input
See the Serial Interface section
Rev. C | Page 3 of 24
AD7475/AD7495
Parameter
POWER REQUIREMENTS
V
DD
V
DRIVE
I
DD 3
Normal Mode (Static)
Normal Mode (Operational)
Partial Power-Down Mode
Partial Power-Down Mode
Full Power-Down Mode
Power Dissipation
3
Normal Mode (Operational)
Partial Power-Down (Static)
Full Power-Down
1
2
Data Sheet
A Version
1
2.7/5.25
2.7/5.25
750
2.1
1.5
450
100
1
10.5
4.5
500
300
5
3
B Version
1
2.7/5.25
2.7/5.25
750
2.1
1.5
450
100
1
10.5
4.5
500
300
5
3
Unit
V min/max
V min/max
µA typ
mA max
mA max
µA typ
µA max
µA max
mW max
mW max
µW max
µW max
µW max
µW max
Digital inputs = 0 V or V
DRIVE
V
DD
= 2.7 V to 5.25 V, SCLK on or off
V
DD
= 4.75 V to 5.25 V, f
SAMPLE
= 1 MSPS
V
DD
= 2.7 V to 3.6 V, f
SAMPLE
= 1 MSPS
f
SAMPLE
= 100 kSPS
Static
SCLK on or off
V
DD
= 5 V, f
SAMPLE
= 1 MSPS
V
DD
= 3 V, f
SAMPLE
= 1 MSPS
V
DD
= 5 V
V
DD
= 3 V
V
DD
= 5 V
V
DD
= 3 V
Test Conditions/Comments
Temperature ranges for A, B versions: −40°C to +85°C.
Guaranteed by initial characterization.
3
See the Power vs. Throughput Rate section.
Rev. C | Page 4 of 24
Data Sheet
AD7495
SPECIFICATIONS
V
DD
= 2.7 V to 5.25 V, V
DRIVE
= 2.7 V to 5.25 V, f
SCLK
= 20 MHz, T
A
= T
MIN
to T
MAX,
unless otherwise noted.
Table 2.
Parameter
DYNAMIC PERFORMANCE
Signal-to-Noise and Distortion (SINAD)
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise
(SFDR)
Intermodulation Distortion (IMD)
Second-Order Terms
Third-Order Terms
Aperture Delay
Aperture Jitter
Full Power Bandwidth
Full Power Bandwidth
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
A Version
1
68
−75
−76
B Version
1
68
−75
−76
Unit
dB min
dB max
dB max
AD7475/AD7495
Test Conditions/Comments
f
IN
= 300 kHz sine wave, f
SAMPLE
= 1 MSPS
f
IN
= 300 kHz sine wave, f
SAMPLE
= 1 MSPS
f
IN
= 300 kHz sine wave, f
SAMPLE
= 1 MSPS
−78
−78
10
50
8.3
1.3
12
±1.5
±0.5
+1.5/−0.9
±0.6
±8
±7
0 to 2.5
±1
20
2.4625/2.5375
10
50
V
DRIVE
− 1
0.4
±1
10
−78
−78
10
50
8.3
1.3
12
±1
±0.5
+1.5/−0.9
±0.6
±8
±7
0 to 2.5
±1
20
2.4625/2.5375
10
50
V
DRIVE
− 1
0.4
±1
10
dB typ
dB typ
ns typ
ps typ
MHz typ
MHz typ
Bits
LSB max
LSB typ
LSB max
LSB typ
LSB max
LSB max
V
µA max
pF typ
V min/max
Ω typ
ppm/°C typ
V min
V max
µA max
pF max
V min
V max
µA max
pF max
@ 3 dB
@ 0.1 dB
Offset Error
Gain Error
ANALOG INPUT
Input Voltage Ranges
DC Leakage Current
Input Capacitance
REFERENCE OUTPUT
REF OUT Output Voltage
REF OUT Impedance
REF OUT Temperature Coefficient
LOGIC INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN 2
LOGIC OUTPUTS
Output High Voltage, V
OH
Output Low Voltage, V
OL
Floating-State Leakage Current
Floating-State Output Capacitance
2
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time
Throughput Rate
@ 5 V (typ @ 3 V)
@ 25°C
@ 5 V guaranteed no missed codes to
12 bits (typ @ 3 V)
@ 25°C
Typically ±2.5 LSB
Typically ±2.5 LSB
Typically 10 nA, V
IN
= 0 V or V
DRIVE
V
DRIVE
− 0.2
0.4
0.4
±10
±10
10
10
Straight (Natural) Binary
800
300
325
1
800
300
325
1
I
SOURCE
= 200 µA; V
DD
= 2.7 V to 5.25 V
I
SINK
= 200 µA
ns max
ns max
ns max
MSPS max
16 SCLK cycles with SCLK @ 20 MHz
Sine wave input
Full-scale step input
See the Serial Interface section
Rev. C | Page 5 of 24
