Data Sheet
FEATURES
Bandwidth: 50 MHz at 5 V
Low noise: 4.5 nV/√Hz
Offset voltage: 100 μV typical, specified over
entire common-mode range
Slew rate: 41 V/μs
Rail-to-rail input and output swing
Input bias current: 1 pA
Single-supply operation: 2.7 V to 5.5 V
Space-saving MSOP and SOIC_N packaging
50 MHz, Precision, Low Distortion,
Low Noise CMOS Amplifiers
AD8651/AD8652
PIN CONFIGURATIONS
NC
1
–IN
2
+IN
3
V
– 4
NC
V
+
OUT
03301-001
8
OUT A
1
–IN A
2
+IN A
3
V
– 4
8
V
+
OUT B
03301-003
03301-004
AD8651
TOP VIEW
(Not to Scale)
7
6
5
AD8652
TOP VIEW
(Not to Scale)
7
6
5
–IN B
+IN B
NC
NC = NO CONNECT
Figure 1. 8-Lead MSOP (RM-8)
NC
1
–IN
2
8
Figure 2. 8-Lead MSOP (RM-8)
NC
V
+
OUT A
1
–IN A
2
+IN A
3
03301-002
AD8651
8
7
V
+
OUT B
APPLICATIONS
Optical communications
Laser source drivers/controllers
Broadband communications
High speed ADCs and DACs
Microwave link interface
Cell phone PA control
Video line drivers
Audio
+IN
3
6
OUT
TOP VIEW
V
– 4
(Not to Scale)
5
NC
AD8652
7
6
–IN B
TOP VIEW
V
– 4
(Not to Scale)
5
+IN B
NC = NO CONNECT
Figure 3. 8-Lead SOIC_N (R-8)
Figure 4. 8-Lead SOIC_N (R-8)
GENERAL DESCRIPTION
The
AD865x
family consists of high precision, low noise, low
distortion, rail-to-rail CMOS operational amplifiers that run
from a single-supply voltage of 2.7 V to 5.5 V.
The
AD865x
family is made up of rail-to-rail input and output
amplifiers with a gain bandwidth of 50 MHz and a typical
voltage offset of 100 μV across common mode from a 5 V
supply. It also features low noise—4.5 nV/√Hz.
The
AD865x
family can be used in communications applications,
such as cell phone transmission power control, fiber optic
networking, wireless networking, and video line drivers.
The
AD865x
family features the newest generation of DigiTrim®
in-package trimming. This new generation measures and corrects
the offset over the entire input common-mode range, providing
less distortion from V
OS
variation than is typical of other rail-to-
rail amplifiers. Offset voltage and CMRR are both specified and
guaranteed over the entire common-mode range as well as over
the extended industrial temperature range.
The
AD865x
family is offered in the narrow 8-lead SOIC
package and the 8-lead MSOP package. The amplifiers are
specified over the extended industrial temperature range
(−40°C to +125°C).
Rev. D
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AD8651/AD8652
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configurations ........................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics ............................................................. 3
Absolute Maximum Ratings............................................................ 5
ESD Caution .................................................................................. 5
Data Sheet
Thermal Resistance .......................................................................5
Typical Performance Characteristics ..............................................6
Applications..................................................................................... 14
Theory of Operation .................................................................. 14
Layout, Grounding, and Bypassing Considerations .............. 15
Outline Dimensions ....................................................................... 18
Ordering Guide .......................................................................... 19
REVISION HISTORY
2/14—Rev. C to Rev. D
Changes to Figure 21 ........................................................................ 8
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 19
8/06—Rev. B. to Rev. C
Changes to Figure 1 to Figure 4 ...................................................... 1
Changes to Figure 7 and Figure 9 ................................................... 6
Changes to Figure 23 ........................................................................ 9
Changes to Figure 53 ...................................................................... 14
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 19
9/04—Rev. A to Rev. B
Added AD8652 .................................................................... Universal
Change to General Description ....................................................... 1
Changes to Electrical Characteristics ............................................. 3
Changes to Absolute Maximum Ratings ........................................ 5
Change to Figure 23 .......................................................................... 9
Change to Figure 26 .......................................................................... 9
Change to Figure 36 ........................................................................ 11
Change to Figure 42 ........................................................................ 12
Change to Figure 49 ........................................................................ 13
Change to Figure 51 ........................................................................ 13
Inserted Figure 52 ............................................................................ 13
Change to Theory of Operation section ....................................... 14
Change to Input Protection section .............................................. 15
Changes to Ordering Guide ........................................................... 20
6/04—Rev. 0 to Rev. A
Change to Figure 18 ............................................................................. 8
Change to Figure 21 ............................................................................. 9
Change to Figure 29 ............................................................................. 10
Change to Figure 30 ............................................................................. 10
Change to Figure 43 ............................................................................. 12
Change to Figure 44 ............................................................................. 12
Change to Figure 47 ............................................................................. 13
Change to Figure 57 ............................................................................. 17
10/03 Revision 0: Initial Version
Rev. D | Page 2 of 20
Data Sheet
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
V
+
= 2.7 V, V
–
= 0 V, V
CM
= V
+
/2, T
A
= 25°C, unless otherwise specified.
Table 1.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
AD8651
AD8651/AD8652
Symbol
V
OS
Conditions
Min
Typ
Max
Unit
AD8652
Offset Voltage Drift
Input Bias Current
Input Offset Current
TCV
OS
I
B
0 V ≤ V
CM
≤ 2.7 V
–40°C ≤ T
A
≤ +85°C, 0 V ≤ V
CM
≤ 2.7 V
–40°C ≤ T
A
≤ +125°C, 0 V ≤ V
CM
≤ 2.7 V
0 V ≤ V
CM
≤ 2.7 V
–40°C ≤ T
A
≤ +125°C, 0 V ≤ V
CM
≤ 2.7 V
100
90
0.4
4
1
1
350
1.4
1.6
300
1.3
10
600
10
30
600
+2.8
–40°C ≤ T
A
≤ +125°C
I
OS
–40°C ≤ T
A
≤ +85°C
–40°C ≤ T
A
≤ +125°C
Input Voltage Range
Common-Mode Rejection Ratio
AD8651
V
CM
CMRR
V
+
= 2.7 V, –0.1 V < V
CM
< +2.8 V
–40°C ≤ T
A
≤ +85°C, –0.1 V < V
CM
< +2.8 V
–40°C ≤ T
A
≤ +125°C, –0.1 V < V
CM
< +2.8 V
V
+
= 2.7 V, –0.1 V < V
CM
< +2.8 V
–40°C ≤ T
A
≤ +125°C, –0.1 V < V
CM
< +2.8 V
R
L
= 1 kΩ, 200 mV < V
O
< 2.5 V
R
L
= 1 kΩ, 200 mV < V
O
< 2.5 V, T
A
= 85°C
R
L
= 1 kΩ, 200 mV < V
O
< 2.5 V, T
A
= 125°C
I
L
= 250 μA, –40°C ≤ T
A
≤ +125°C
I
L
= 250 μA, –40°C ≤ T
A
≤ +125°C
Sourcing
Sinking
–0.1
75
70
65
77
73
100
100
95
2.67
95
88
85
95
90
115
114
108
μV
mV
mV
μV
mV
μV/°C
pA
pA
pA
pA
pA
V
dB
dB
dB
dB
dB
dB
dB
dB
V
mV
mA
mA
mA
dB
dB
AD8652
Large Signal Voltage Gain
A
VO
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Short-Circuit Limit
Output Current
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current
AD8651
AD8652
INPUT CAPACITANCE
Differential
Common Mode
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Settling Time, 0.01%
Overload Recovery Time
Total Harmonic Distortion + Noise
NOISE PERFORMANCE
Voltage Noise Density
Current Noise Density
V
OH
V
OL
I
SC
I
O
PSRR
I
SY
30
80
80
40
76
74
94
93
9
17.5
12
14.5
19.5
22.5
V
S
= 2.7 V to 5.5 V, V
CM
= 0 V
–40°C ≤ T
A
≤ +125°C
I
O
= 0
–40°C ≤ T
A
≤ +125°C
I
O
= 0
–40°C ≤ T
A
≤ +125°C
mA
mA
mA
mA
pF
pF
V/μs
MHz
μs
μs
%
nV/√Hz
nV/√Hz
fA/√Hz
C
IN
6
9
SR
GBP
G = 1, R
L
= 10 kΩ
G=1
G = ±1, 2 V step
V
IN
× G = 1.48 V
+
G = 1, R
L
= 600 Ω, f = 1 kHz, V
IN
= 2 V p-p
f = 10 kHz
f = 100 kHz
f = 10 kHz
41
50
0.2
0.1
0.0006
5
4.5
4
THD + N
e
n
i
n
Rev. D | Page 3 of 20
AD8651/AD8652
V
+
= 5 V, V
–
= 0 V, V
CM
= V
+
/2, T
A
= 25°C, unless otherwise specified.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
AD8651
Data Sheet
Symbol
V
OS
Conditions
Min
Typ
Max
Unit
AD8652
Offset Voltage Drift
Input Bias Current
TCV
OS
I
B
0 V ≤ V
CM
≤ 5 V
–40°C ≤ T
A
≤ +85°C, 0 V ≤ V
CM
≤ 5 V
–40°C ≤ T
A
≤ +125°C, 0 V ≤ V
CM
≤ 5 V
0 V ≤ V
CM
≤ 5 V
–40°C ≤ T
A
≤ +125°C, 0 V ≤ V
CM
≤ 5 V
100
90
0.4
4
1
350
1.4
1.7
300
1.4
10
30
600
10
30
600
+5.1
–40°C ≤ T
A
≤ +85°C
–40°C ≤ T
A
≤ +125°C
Input Offset Current
I
OS
–40°C ≤ T
A
≤ +85°C
–40°C ≤ T
A
≤ +125°C
Input Voltage Range
Common-Mode Rejection Ratio
AD8651
V
CM
CMRR
0.1 V < V
CM
< 5.1 V
–40°C ≤ T
A
≤ +85°C, 0.1 V < V
CM
< 5.1 V
–40°C ≤ T
A
≤ +125°C, 0.1 V < V
CM
< 5.1 V
0.1 V < V
CM
< 5.1 V
–40°C ≤ T
A
≤ +125°C, 0.1 V < V
CM
< 5.1 V
R
L
= 1 kΩ, 200 mV < V
O
< 4.8 V
R
L
= 1 kΩ, 200 mV < V
O
< 4.8 V, T
A
= 85°C
R
L
= 1 kΩ, 200 mV < V
O
< 4.8 V, T
A
= 125°C
I
L
= 250 µA, –40°C ≤ T
A
≤ +125°C
I
L
= 250 µA, –40°C ≤ T
A
≤ +125°C
Sourcing
Sinking
–0.1
80
75
70
84
76
100
98
95
4.97
95
94
90
100
95
115
114
111
1
μV
mV
mV
μV
mV
μV/°C
pA
pA
pA
pA
pA
pA
V
dB
dB
dB
dB
dB
dB
dB
dB
V
mV
mA
mA
mA
dB
dB
AD8652
Large Signal Voltage Gain
A
VO
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Short-Circuit Limit
Output Current
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current
AD8651
AD8652
INPUT CAPACITANCE
Differential
Common Mode
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Settling Time, 0.01%
Overload Recovery Time
Total Harmonic Distortion + Noise
NOISE PERFORMANCE
Voltage Noise Density
Current Noise Density
V
OH
V
OL
I
SC
I
O
PSRR
I
SY
30
80
80
40
76
74
94
93
9.5
17.5
14.0
15
20.0
23.5
V
S
= 2.7 V to 5.5 V, V
CM
= 0 V
–40°C ≤ T
A
≤ +125°C
I
O
= 0
–40°C ≤ T
A
≤ +125°C
I
O
= 0
–40°C ≤ T
A
≤ +125°C
mA
mA
mA
mA
pF
pF
V/µs
MHz
μs
μs
%
nV/√Hz
nV/√Hz
fA/√Hz
C
IN
6
9
SR
GBP
G = 1, R
L
= 10 kΩ
G=1
G = ±1, 2 V step
V
IN
× G = 1.2 V
+
G = 1, R
L
= 600 Ω, f = 1 kHz, V
IN
= 2 V p-p
f = 10 kHz
f = 100 kHz
f = 10 kHz
41
50
0.2
0.1
0.0006
5
4.5
4
THD + N
e
n
i
n
Rev. D | Page 4 of 20
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings apply at 25°C, unless otherwise noted.
Table 3.
Parameter
Supply Voltage
Input Voltage
Differential Input Voltage
Output Short-Circuit Duration to GND
Electrostatic Discharge (HBM)
Storage Temperature Range
RM, R Package
Operating Temperature Range
Junction Temperature Range
RM, R Package
Lead Temperature (Soldering, 10 sec)
Rating
6.0 V
GND to V
S
+ 0.3 V
±6.0 V
Indefinite
4000 V
AD8651/AD8652
ESD CAUTION
THERMAL RESISTANCE
−65°C to +150°C
−40°C to +125°C
−65°C to +150°C
300°C
θ
JA
is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
8-Lead MSOP (RM)
8-Lead SOIC_N (R)
θ
JA
210
158
θ
JC
45
43
Unit
°C/W
°C/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. D | Page 5 of 20
