numbers reflect the limitations of the test circuit rather than the
device itself.
IS
≤
-
ID
24A
di
/
dt
≤
700A/µs
VR
≤
VDSS TJ
≤
150
°
C
6 Eon includes diode reverse recovery. See figures 18, 20.
APT Reserves the right to change, without notice, the specifications and information contained herein.
0.35
0.30
0.25
0.20
0.15
0.9
0.7
0.5
Note:
PDM
t1
t2
9-2004
0.3
0.10
0.05
0
10
-5
0.1
0.05
10
-4
050-7066 Rev B
t
Duty Factor D = 1/t2
Peak TJ = PDM x Z
θJC
+ TC
SINGLE PULSE
10
-3
10
-2
10
-1
RECTANGULAR PULSE DURATION (SECONDS)
FIGURE 1, MAXIMUM EFFECTIVE TRANSIENT THERMAL IMPEDANCE, JUNCTION-TO-CASE vs PULSE DURATION
1.0
Typical Performance Curves
Junction
temp. (°C)
RC MODEL
80
70
I
D
, DRAIN CURRENT (AMPERES)
0.00401F
APT6025BFLL_SFLL
VGS =15 &10V
8V
7V
6.5
6V
5.5V
5V
0.0175
60
50
40
30
20
10
0
Power
(watts)
0.143
0.00641F
0.219
Case temperature. (°C)
0.158F
R
DS(ON)
, DRAIN-TO-SOURCE ON RESISTANCE
FIGURE 2, TRANSIENT THERMAL IMPEDANCE MODEL
80
70
I
D
, DRAIN CURRENT (AMPERES)
VDS> ID (ON) x RDS(ON) MAX.
250µSEC. PULSE TEST
@ <0.5 % DUTY CYCLE
0
5
10
15
20
25
30
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 3, LOW VOLTAGE OUTPUT CHARACTERISTICS
1.40
V
GS
NORMALIZED TO
= 10V @ I = 12A
D
1.30
1.20
1.10
1.00
0.90
0.80
VGS=10V
60
50
40
30
20
10
0
TJ = -55°C
0
1
2
3
4
5
6
7
8
9
V
GS
, GATE-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 4, TRANSFER CHARACTERISTICS
TJ = +125°C
TJ = +25°C
VGS=20V
0
25
BV
DSS
, DRAIN-TO-SOURCE BREAKDOWN
VOLTAGE (NORMALIZED)
1.15
10
20
30
40
50
I
D
, DRAIN CURRENT (AMPERES)
FIGURE 5, R
DS(ON)
vs DRAIN CURRENT
I
D
, DRAIN CURRENT (AMPERES)
20
1.10
15
1.05
10
1.00
5
0.95
R
DS(ON)
, DRAIN-TO-SOURCE ON RESISTANCE
(NORMALIZED)
50
75
100
125
150
T
C
, CASE TEMPERATURE (°C)
FIGURE 6, MAXIMUM DRAIN CURRENT vs CASE TEMPERATURE
2.5
I
V
D
0
25
0.90
-50
-25
0
25
50 75 100 125 150
T
J
, JUNCTION TEMPERATURE (°C)
FIGURE 7, BREAKDOWN VOLTAGE vs TEMPERATURE
1.2
1.1
1.0
0.9
0.8
0.7
0.6
-50
= 12A
= 10V
2.0
1.5
1.0
V
GS(TH)
, THRESHOLD VOLTAGE
(NORMALIZED)
GS
0.5
0.0
-50
-25
0
25 50
75 100 125 150
T
J
, JUNCTION TEMPERATURE (°C)
FIGURE 8, R
DS(ON)
vs. TEMPERATURE
-25
0
25
50
75 100 125 150
T
C
, CASE TEMPERATURE (°C)
FIGURE 9, THRESHOLD VOLTAGE vs TEMPERATURE
050-7066 Rev B
9-2004
96
I
D
, DRAIN CURRENT (AMPERES)
10,000
OPERATION HERE
LIMITED BY RDS (ON)
APT6025BFLL_SFLL
Ciss
50
C, CAPACITANCE (pF)
1,000
Coss
100µS
10
100
Crss
1
TC =+25°C
TJ =+150°C
SINGLE PULSE
1mS
1
10
100
600
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 10, MAXIMUM SAFE OPERATING AREA
I
D
10mS
0
10
20
30
40
50
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 11, CAPACITANCE vs DRAIN-TO-SOURCE VOLTAGE
I
DR
, REVERSE DRAIN CURRENT (AMPERES)
10
V
GS
, GATE-TO-SOURCE VOLTAGE (VOLTS)
16
= 24A
200
100
12
VDS=120V
8
VDS=300V
VDS=480V
4
TJ =+150°C
TJ =+25°C
10
20 30 40 50 60 70 80 90 100
Q
g
, TOTAL GATE CHARGE (nC)
FIGURE 12, GATE CHARGE vs GATE-TO-SOURCE VOLTAGE
50
t
d(off)
V
= 400V
0
0
10
1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
V
SD
, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
FIGURE 13, SOURCE-DRAIN DIODE FORWARD VOLTAGE
60
50
40
V
DD
G
= 400V
R
= 5Ω
40
t
d(on)
and t
d(off)
(ns)
DD
G
T = 125°C
J
L = 100µH
30
R
= 5Ω
t
r
and t
f
(ns)
T = 125°C
J
L = 100µH
30
20
t
f
t
r
20
t
d(on)
10
10
0
0
0
20
30
40
I
D
(A)
FIGURE 14, DELAY TIMES vs CURRENT
V
DD
G
10
20
30
40
I
D
(A)
FIGURE 15, RISE AND FALL TIMES vs CURRENT
900
V
DD
0
10
800
700
SWITCHING ENERGY (µJ)
= 400V
= 400V
R
= 5Ω
800
SWITCHING ENERGY (µJ)
I
T = 125°C
J
D
J
= 24A
E
off
600
500
400
300
200
100
L = 100µH
E
ON
includes
diode reverse recovery.
700
600
500
400
300
200
100
T = 125°C
L = 100µH
E
ON
includes
diode reverse recovery.
E
on
E
on
050-7066 Rev B
9-2004
E
off
20
25 30
35 40
I
D
(A)
FIGURE 16, SWITCHING ENERGY vs CURRENT
0
0
5
10
15
10 15 20 25 30 35 40 45 50
R
G
, GATE RESISTANCE (Ohms)
FIGURE 17, SWITCHING ENERGY VS. GATE RESISTANCE
0
0
5
APT6025BFLL_SFLL
Gate Voltage
10 %
t
d(on)
Drain Current
T = 125 C
J
90%
t
d(off)
Gate Voltage
T = 125 C
J
90%
5%
t
r
5%
Drain Voltage
Drain Voltage
90%
tf
10%
Drain Current
10 %
Switching Energy
Switching Energy
Figure 18, Turn-on Switching Waveforms and Definitions
Figure 19, Turn-off Switching Waveforms and Definitions
APT15DF60
V
DD
I
D
V
DS
G
D.U.T.
Figure 20, Inductive Switching Test Circuit
TO-247 Package Outline
Drain
(Heat Sink)
4.69 (.185)
5.31 (.209)
1.49 (.059)
2.49 (.098)
6.15 (.242) BSC
D PAK Package Outline
4.98 (.196)
5.08 (.200)
1.47 (.058)
1.57 (.062)
15.95 (.628)
16.05 (.632)
13.41 (.528)
13.51 (.532)
3
15.49 (.610)
16.26 (.640)
5.38 (.212)
6.20 (.244)
1.04 (.041)
1.15 (.045)
Drain
20.80 (.819)
21.46 (.845)
3.50 (.138)
3.81 (.150)
Revised
4/18/95
13.79 (.543)
13.99 (.551)
Revised
8/29/97
11.51 (.453)
11.61 (.457)
0.46 (.018)
0.56 (.022) {3 Plcs}
4.50 (.177) Max.
0.40 (.016)
0.79 (.031)
2.87 (.113)
3.12 (.123)
1.65 (.065)
2.13 (.084)
1.01 (.040)
1.40 (.055)
19.81 (.780)
20.32 (.800)
2.21 (.087)
2.59 (.102)
5.45 (.215) BSC
2-Plcs.
Dimensions in Millimeters and (Inches)
Source
Drain
Gate
Dimensions in Millimeters (Inches)
APT’s products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522
5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.
Microchip MCU
