Features
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High FSK Sensitivity: –106 dBm at 20 Kbit/s/–109.5 dBm at 2.4 Kbit/s (433.92 MHz)
High ASK Sensitivity: –112.5 dBm at 10 Kbit/s/–116.5 dBm at 2.4 Kbit/s (433.92 MHz)
Low Supply Current: 10.5 mA in RX and TX Mode (3V/TX with 5 dBm)
Data Rate 1 to 20 Kbit/s Manchester FSK, 1 to 10 Kbit/s Manchester ASK
ASK/FSK Receiver Uses a Low-IF Architecture with High Selectivity, Blocking and Low
Intermodulation (Typical Blocking 55 dB at ±750 kHz/61 dB at ±1.5 MHz and
70 dB at ±10 MHz, System I1dBCP = –30 dBm/System IIP3 = –20 dBm)
226 kHz IF Frequency with 30 dB Image Rejection and 170 kHz Usable IF Bandwidth
Transmitter Uses Closed Loop Fractional-N Synthesizer for FSK Modulation with a
High PLL Bandwidth and an Excellent Isolation between PLL and PA
Tolerances of XTAL Compensated by Fractional-N Synthesizer with 800 Hz RF
Resolution
Integrated RX/TX-Switch, Single-ended RF Input and Output
RSSI (Received Signal Strength Indicator)
Communication to Microcontroller with SPI Interface Working at Maximum 500 kBit/s
Configurable Self Polling and RX/TX Protocol Handling with FIFO-RAM Buffering of
Received and Transmitted Data
5 Push Button Inputs and One Wake-up Input are Active in Power-down Mode
Integrated XTAL Capacitors
PA Efficiency: up to 38% (433 MHz/10 dBm/3V)
Low Inband Sensitivity Change of Typically ±1.8 dB within ±58 kHz Center Frequency
Change in the Complete Temperature and Supply Voltage Range
Supply Voltage Switch, Supply Voltage Regulator, Reset Generation, Clock/Interrupt
Generation and Low Battery Indicator for Microcontroller
Fully Integrated PLL with Low Phase Noise VCO and PLL Loop Filter
Sophisticated Threshold Control and Quasi Peak Detector Circuit in the Data Slicer
Power Management via Different Operation Modes
433.92 MHz, 868.3 MHz and 315 MHz without External VCO and PLL Components
Inductive Supply with Voltage Regulator if Battery is Empty (AUX Mode)
Efficient XTO Start-up Circuit (> –1.5 kΩ Worst Case Start Impedance)
Changing of Modulation Type ASK/FSK and Data Rate without Component Changes
Minimal External Circuitry Requirements for Complete System Solution
Adjustable Output Power: 0 to 10 dBm Adjusted and Stabilized with External Resistor
ESD Protection at all Pins (2 kV HBM, 200 V MM)
Supply Voltage Range: 2.4V to 3.6V or 4.4V to 6.6V
Temperature Range: –40°C to +105°C
Small 7
×
7 mm QFN48 Package
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UHF ASK/FSK
Transceiver
ATA5811
ATA5812
4689F–RKE–08/06
Applications
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Automotive Keyless Entry and Passive Entry Go Systems
Access Control Systems
Remote Control Systems
Alarm and Telemetry Systems
Energy Metering
Home Automation
Benefits
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No SAW Device Needed in Key Fob Designs to Meet Automotive Specifications
Low System Cost Due to Very High System Integration Level
Only One Crystal Needed in System
Less Demanding Specification for the Microcontroller Due to Handling of Power-down Mode,
Delivering of Clock, Reset, Low Battery Indication and Complete Handling of Receive/Transmit
Protocol and Polling
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Single-ended Design with High Isolation of PLL/VCO from PA and the Power Supply Allows a
Loop Antenna in the Key Fob to Surround the Whole Application
1. General Description
The ATA5811/ATA5812 is a highly integrated UHF ASK/FSK single-channel half-duplex trans-
ceiver with low power consumption supplied in a small QFN48 package. The receive part is built
as a fully integrated low-IF receiver, whereas direct PLL modulation with the fractional-N synthe-
sizer is used for FSK transmission and switching of the power amplifier for ASK transmission.
The device supports data rates of 1 Kbit/s to 20 Kbit/s (FSK) and 1 Kbit/s to 10 Kbit/s (ASK) in
Manchester, Bi-phase and other codes in transparent mode. The ATA5811 can be used in the
433 MHz to 435 MHz and the 868 MHz to 870 MHz band, the ATA5812 in the 314 MHz to
316 MHz band. The very high system integration level results in few numbers of external compo-
nents needed.
Due to its blocking and selectivity performance, together with the additional 15 dB to 20 dB loss
and the narrow bandwidth of a typical key fob loop antenna, a bulky blocking SAW is not needed
in the key fob or sensor application. Additionally, the building blocks needed for a typical RKE
and access control system on both sides, the base and the mobile stations, are fully integrated.
Its digital control logic with self polling and protocol generation enables a fast challenge
response systems without using a high-performance microcontroller. Therefore, the
ATA5811/ATA5812 contains a FIFO buffer RAM and can compose and receive the physical
messages themselves. This provides more time for the microcontroller to carry out other func-
tions such as calculating crypto algorithms, composing the logical messages and controlling
other devices. Due to that, a standard 4-/8-bit microcontroller without special periphery and
clocked with the CLK output of about 4.5 MHz is sufficient to control the communication link.
This is especially valid for passive entry and access control systems, where within less than
100 ms several challenge response communications with arbitration of the communication part-
ner have to be handled.
It is hence possible to design bi-directional RKE and access control systems with a fast chal-
lenge response crypto function with the same PCB board size and with the same current
consumption as uni-directional RKE systems.
2
ATA5811/ATA5812
4689F–RKE–08/06
ATA5811/ATA5812
Figure 1-1.
System Block Diagram
ATA5811/ATA5812
RF transceiver
Digital control
logic
Power supply
Antenna
Microcontroller
Microcontroller
interface
4 to 8
Matching
XTO
Figure 1-2.
Pinning
QFN48
NC
NC
RX_ACTIVE
T1
T2
T3
T4
T5
PWR_ON
RX_TX1
RX_TX2
CDEM
NC
NC
NC
RF_IN
NC
433_N868
NC
R_PWR
PWR_H
RF_OUT
NC
NC
1
2
3
4
5
6
7
8
9
10
11
48 47 46 45 44 43 42 41 40 39 38 37
36
35
34
33
32
31
30
29
28
27
26
ATA5811/ATA5812
12
25
13 14 15 16 17 18 19 20 21 22 23 24
RSSI
CS
DEM_OUT
SCK
SDI_TMDI
SDO_TMDO
CLK
IRQ
N_RESET
VSINT
NC
XTAL2
NC
NC
NC
AVCC
VS2
VS1
VAUX
TEST1
DVCC
VSOUT
TEST2
TXAL1
3
4689F–RKE–08/06
Table 1-1.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
Pin Description
Symbol
NC
NC
NC
RF_IN
NC
433_N868
NC
R_PWR
PWR_H
RF_OUT
NC
NC
NC
NC
NC
AVCC
VS2
VS1
VAUX
TEST1
DVCC
VSOUT
TEST2
XTAL1
XTAL2
NC
VSINT
N_RESET
IRQ
CLK
SDO_TMDO
SDI_TMDI
SCK
DEM_OUT
CS
RSSI
CDEM
RX_TX2
RX_TX1
PWR_ON
T5
Function
Not connected
Not connected
Not connected
RF input
Not connected
Selects RF input/output frequency range
Not connected
Resistor to adjust output power
Pin to select output power
RF output
Not connected
Not connected
Not connected
Not connected
Not connected
Blocking of the analog voltage supply
Power supply input for voltage range 4.4V to 6.6V
Power supply input for voltage range 2.4V to 3.6V
Auxiliary supply voltage input
Test input, at GND during operation
Blocking of the digital voltage supply
Output voltage power supply for external devices
Test input, at GND during operation
Reference crystal
Reference crystal
Not connected
Microcontroller Interface supply voltage
Output pin to reset a connected microcontroller
Interrupt request
Output to clock a connected microcontroller
Serial data out/transparent mode data out
Serial data in/transparent mode data in
Serial clock
Demodulator open drain output signal
Chip select for serial interface
Output of the RSSI amplifier
Capacitor to adjust the lower cut-off frequency data filter
GND pin to decouple LNA in TX mode
Switch pin to decouple LNA in TX mode
Input to switch on the system (active high)
Key input 5 (can also be used to switch on the system (active low)
4
ATA5811/ATA5812
4689F–RKE–08/06
ATA5811/ATA5812
Table 1-1.
Pin
42
43
44
45
46
47
48
Pin Description (Continued)
Symbol
T4
T3
T2
T1
RX_ACTIVE
NC
NC
GND
Function
Key input 4 (can also be used to switch on the system (active low)
Key input 3 (can also be used to switch on the system (active low)
Key input 2 (can also be used to switch on the system (active low)
Key input 1 (can also be used to switch on the system (active low)
Indicates RX operation mode
Not connected
Not connected
Ground/backplane
Figure 1-3.
Block Diagram
AVCC
RX_ACTIVE
DVCC
433_N868
R_PWR
RF_OUT
PWR_H
RX_TX1
RX_TX2
PA
RF transceiver
Frontend Enable
PA_Enable (ASK)
TX_DATA (FSK)
RX/TX
Fractional-N
frequency
synthesizer
Signal
processing
(Mixer, IF
filter, IF
amplifier,
demodulator,
data filter
data slicer)
FREQ
FREF
9
Digital control logic
Power
supply
VS2
VS1
VAUX
VSOUT
Switches
regulators
wakeup
reset
TX/RX - data buffer
control register
status register
polling circuit
bit check logic
PWR_ON
T1
T2
T3
T4
T5
TX
Demod_Out
RF_IN
LNA
CDEM
RSSI
XTAL1
XTAL2
DEM_OUT
CLK
N_RESET
IRQ
CS
SCK
SDI_TMDI
SDO_TMDO
Microcontroller
interface
Reset
XTO
TEST
TES2
SPI
VSINT
GND
5
4689F–RKE–08/06
