Intel
®
Core™2 Extreme Processor
QX9000
Δ
Series, Intel
®
Core™2 Quad
Processor Q9000
Δ
, Q9000S
Δ
, Q8000
Δ
,
and Q8000S
Δ
Series
Datasheet
— on 45 nm process in the 775 land package
August 2009
Document Number: 318726-010
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The Intel
®
Core™2 Extreme processor QX9000 series and Intel
®
Core™2 Quad processor Q9000, Q9000S, Q8000, and Q8000S
series may contain design defects or errors known as errata which may cause the product to deviate from published specifications.
Current characterized errata are available on request.
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®
64 requires a computer system with a processor, chipset, BIOS, operating system, device drivers, and applications enabled
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±
Intel
®
Δ
Intel
Virtualization Technology requires a computer system with an enabled Intel
®
processor, BIOS, virtual machine monitor
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‡ Not all specified units of this processor support Enhanced Intel SpeedStep
®
Technology. See the Processor Spec Finder at http:/
/processorfinder.intel.com or contact your Intel representative for more information.
Not all specified units of this processor support Thermal Monitor 2, Enhanced HALT State and Enhanced Intel SpeedStep®
Technology. See the Processor Spec Finder at http://processorfinder.intel.com or contact your Intel representative for more
information.
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*Other names and brands may be claimed as the property of others.
Copyright © 2007–2009, Intel Corporation. All Rights Reserved.
2
Datasheet
Contents
1
Introduction
............................................................................................................ 11
1.1
Terminology ..................................................................................................... 12
1.1.1 Processor Terminology Definitions ............................................................ 12
1.2
References ....................................................................................................... 14
Electrical Specifications
........................................................................................... 15
2.1
Power and Ground Lands.................................................................................... 15
2.2
Decoupling Guidelines ........................................................................................ 15
2.2.1 VCC Decoupling ..................................................................................... 15
2.2.2 Vtt Decoupling ....................................................................................... 15
2.2.3 FSB Decoupling...................................................................................... 16
2.3
Voltage Identification ......................................................................................... 16
2.4
Reserved, Unused, and TESTHI Signals ................................................................ 18
2.5
Power Segment Identifier (PSID)......................................................................... 18
2.6
Voltage and Current Specification ........................................................................ 19
2.6.1 Absolute Maximum and Minimum Ratings .................................................. 19
2.6.2 DC Voltage and Current Specification ........................................................ 20
2.6.3 VCC Overshoot ...................................................................................... 25
2.6.4 Die Voltage Validation ............................................................................. 25
2.7
Signaling Specifications...................................................................................... 26
2.7.1 FSB Signal Groups.................................................................................. 26
2.7.2 CMOS and Open Drain Signals ................................................................. 28
2.7.3 Processor DC Specifications ..................................................................... 28
2.7.3.1 Platform Environment Control Interface (PECI) DC Specifications..... 29
2.7.3.2 GTL+ Front Side Bus Specifications ............................................. 30
2.8
Clock Specifications ........................................................................................... 31
2.8.1 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking ............................ 31
2.8.2 FSB Frequency Select Signals (BSEL[2:0])................................................. 32
2.8.3 Phase Lock Loop (PLL) and Filter .............................................................. 32
2.8.4 BCLK[1:0] Specifications ......................................................................... 32
Package Mechanical Specifications
.......................................................................... 35
3.1
Package Mechanical Drawing............................................................................... 35
3.2
Processor Component Keep-Out Zones ................................................................. 39
3.3
Package Loading Specifications ........................................................................... 39
3.4
Package Handling Guidelines............................................................................... 39
3.5
Package Insertion Specifications.......................................................................... 40
3.6
Processor Mass Specification ............................................................................... 40
3.7
Processor Materials............................................................................................ 40
3.8
Processor Markings............................................................................................ 40
Land Listing and Signal Descriptions
....................................................................... 43
4.1
Processor Land Assignments ............................................................................... 43
4.2
Alphabetical Signals Reference ............................................................................ 64
Thermal Specifications and Design Considerations
.................................................. 75
5.1
Processor Thermal Specifications ......................................................................... 75
5.1.1 Thermal Specifications ............................................................................ 75
5.1.2 Thermal Metrology ................................................................................. 82
5.2
Processor Thermal Features ................................................................................ 82
5.2.1 Thermal Monitor..................................................................................... 82
5.2.2 Thermal Monitor 2 .................................................................................. 83
2
3
4
5
Datasheet
3
5.3
5.2.3 On-Demand Mode ...................................................................................84
5.2.4 PROCHOT# Signal ..................................................................................85
5.2.5 THERMTRIP# Signal ................................................................................85
Platform Environment Control Interface (PECI) ......................................................86
5.3.1 Introduction ...........................................................................................86
5.3.1.1 TCONTROL and TCC activation on PECI-Based Systems ..................86
5.3.2 PECI Specifications .................................................................................87
5.3.2.1 PECI Device Address..................................................................87
5.3.2.2 PECI Command Support .............................................................87
5.3.2.3 PECI Fault Handling Requirements ...............................................87
5.3.2.4 PECI GetTemp0() Error Code Support ..........................................87
6
Features
..................................................................................................................89
6.1
Power-On Configuration Options ..........................................................................89
6.2
Clock Control and Low Power States .....................................................................89
6.2.1 Normal State .........................................................................................90
6.2.2 HALT and Extended HALT Powerdown States ..............................................90
6.2.2.1 HALT Powerdown State ..............................................................90
6.2.2.2 Extended HALT Powerdown State ................................................91
6.2.3 Stop Grant and Extended Stop Grant States ...............................................91
6.2.3.1 Stop-Grant State.......................................................................91
6.2.3.2 Extended Stop Grant State .........................................................92
6.2.4 Extended HALT Snoop State, HALT Snoop State, Extended
Stop Grant Snoop State, and Stop Grant Snoop State..................................92
6.2.4.1 HALT Snoop State, Stop Grant Snoop State ..................................92
6.2.4.2 Extended HALT Snoop State, Extended Stop Grant Snoop State.......92
6.2.5 Sleep State ............................................................................................92
6.2.6 Deep Sleep State....................................................................................93
6.2.7 Deeper Sleep State .................................................................................93
6.2.8 Enhanced Intel SpeedStep
®
Technology ....................................................94
6.3
Processor Power Status Indicator (PSI) Signal .......................................................94
Boxed Processor Specifications................................................................................95
7.1
Introduction ......................................................................................................95
7.2
Mechanical Specifications ....................................................................................96
7.2.1 Boxed Processor Cooling Solution Dimensions.............................................96
7.2.2 Boxed Processor Fan Heatsink Weight .......................................................97
7.2.3 Boxed Processor Retention Mechanism and Heatsink Attach Clip Assembly .....97
7.3
Electrical Requirements ......................................................................................97
7.3.1 Fan Heatsink Power Supply ......................................................................97
7.4
Thermal Specifications........................................................................................99
7.4.1 Boxed Processor Cooling Requirements......................................................99
7.4.2 Variable Speed Fan ............................................................................... 100
7.5
Boxed Intel
®
Core™2 Extreme Processor QX9650 Specifications ............................ 101
7.5.1 Boxed Intel
®
Core™2 Extreme Processor QX9650 Fan Heatsink Weight........ 102
Debug Tools Specifications
.................................................................................... 105
8.1
Logic Analyzer Interface (LAI) ........................................................................... 105
8.1.1 Mechanical Considerations ..................................................................... 105
8.1.2 Electrical Considerations ........................................................................ 105
7
8
4
Datasheet
Figures
2-1
2-2
2-3
2-4
3-1
3-2
3-3
3-4
3-5
3-6
3-7
4-1
4-2
5-1
5-2
5-3
5-4
5-5
5-6
5-7
6-1
7-1
7-2
7-3
7-4
7-5
7-6
7-7
7-8
7-9
7-10
7-11
7-12
V
CC
Static and Transient Tolerance......................................................................... 24
V
CC
Overshoot Example Waveform ......................................................................... 25
Differential Clock Waveform .................................................................................. 34
Measurement Points for Differential Clock Waveforms ............................................... 34
Processor Package Assembly Sketch....................................................................... 35
Processor Package Drawing (Sheet 1 of 3) .............................................................. 36
Processor Package Drawing (Sheet 2 of 3) .............................................................. 37
Processor Package Drawing (Sheet 3 of 3) .............................................................. 38
Processor Top-Side Markings Example (Intel
®
Core™2 Extreme Processor QX9650)...... 40
Processor Top-Side Markings Example (Intel
®
Core™2 Quad Processor Q9000 Series) .. 41
Processor Land Coordinates and Quadrants, Top View............................................... 42
land-out Diagram (Top View – Left Side)................................................................. 44
land-out Diagram (Top View – Right Side)............................................................... 45
Intel
®
Core™2 Extreme Processor QX9770 Thermal Profile........................................ 78
Intel
®
Core™2 Extreme Processor QX9650 Thermal Profile........................................ 79
Intel
®
Core™2 Quad Processor Q9000 and Q8000 Series Thermal Profile .................... 80
Intel
®
Core™2 Quad Processor Q9000S and Q8000S Series Thermal Profile................. 81
Case Temperature (TC) Measurement Location ........................................................ 82
Thermal Monitor 2 Frequency and Voltage Ordering.................................................. 84
Conceptual Fan Control Diagram on PECI-Based Platforms ........................................ 86
Processor Low Power State Machine ....................................................................... 90
Mechanical Representation of the Boxed Processor ................................................... 95
Space Requirements for the Boxed Processor (side view) .......................................... 96
Space Requirements for the Boxed Processor (top view) ........................................... 96
Space Requirements for the Boxed Processor (overall view) ...................................... 97
Boxed Processor Fan Heatsink Power Cable Connector Description.............................. 98
Baseboard Power Header Placement Relative to Processor Socket............................... 98
Boxed Processor Fan Heatsink Airspace Keepout Requirements (side 1 view) ............... 99
Boxed Processor Fan Heatsink Airspace Keepout Requirements (side 2 view) ............... 99
Boxed Processor Fan Heatsink Set Points .............................................................. 100
Space Requirements for the Boxed Processor (side view) ........................................ 102
Boxed Processor Fan Heatsink Airspace Keepout Requirements (side 1 view) ............. 102
Boxed Processor Fan Heatsink Airspace Keepout Requirements (side 2 view) ............. 103
Datasheet
5