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DM74LS273N

LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP20
LS 系列, 正边沿触发D触发器, 实输出, PDIP20

器件类别：逻辑    逻辑   

厂商名称：Fairchild

厂商官网：http://www.fairchildsemi.com/

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器件：DM74LS273N

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器件参数
参数名称
属性值
是否Rohs认证
不符合
零件包装代码
DIP
包装说明
DIP, DIP20,.3
针数
20
Reach Compliance Code
unknow
Is Samacsys
N
系列
LS
JESD-30 代码
R-PDIP-T20
JESD-609代码
e0
长度
26.075 mm
逻辑集成电路类型
D FLIP-FLOP
最大频率@ Nom-Su
30000000 Hz
最大I（ol）
0.008 A
位数
8
功能数量
1
端子数量
20
最高工作温度
70 °C
最低工作温度
输出极性
TRUE
封装主体材料
PLASTIC/EPOXY
封装代码
DIP
封装等效代码
DIP20,.3
封装形状
RECTANGULAR
封装形式
IN-LINE
峰值回流温度（摄氏度）
NOT SPECIFIED
电源
5 V
最大电源电流（ICC）
27 mA
传播延迟（tpd）
24 ns
认证状态
Not Qualified
座面最大高度
5.08 mm
最大供电电压 (Vsup)
5.25 V
最小供电电压 (Vsup)
4.75 V
标称供电电压 (Vsup)
5 V
表面贴装
NO
技术
TTL
温度等级
COMMERCIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
触发器类型
POSITIVE EDGE
宽度
7.62 mm
最小 fmax
30 MHz
Base Number Matches
1
文档预览
DM74LS273 8-Bit Register with Clear
October 1988
Revised March 2000
DM74LS273
8-Bit Register with Clear
General Description
The DM74LS273 is a high speed 8-bit register, consisting
of eight D-type flip-flops with a common Clock and an
asynchronous active LOW Master Reset. This device is
supplied in a 20-pin package featuring 0.3 inch row spac-
ing.
Features
s
Edge-triggered
s
8-bit high speed register
s
Parallel in and out
s
Common clock and master reset
Ordering Code:
Order Number
DM74LS273WM
DM74LS273SJ
DM74LS273N
Package Number
M20B
M20D
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
V
CC
=
Pin 20
GND
=
Pin 10
Pin Descriptions
Pin Names
CP
D0–D7
MR
Q0–Q7
Data Inputs
Asynchronous Master Reset Input (Active LOW)
Flip-Flop Outputs
Description
Clock Pulse Input (Active Rising Edge)
Truth Table
Inputs
MR
L
H
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Outputs
D
n
X
H
L
Q
n
L
H
L
CP


X
© 2000 Fairchild Semiconductor Corporation
DS009825
www.fairchildsemi.com
DM74LS273
Functional Description
The DM74LS273 is an 8-bit parallel register with a common
Clock and common Master Reset. When the MR input is
LOW, the Q outputs are LOW, independent of the other
inputs. Information meeting the setup and hold time
requirements of the D inputs is transferred to the Q outputs
on the LOW-to-HIGH transition of the clock input.
Logic Diagram
www.fairchildsemi.com
2
DM74LS273
Absolute Maximum Ratings
(Note 1)
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
7V
0°C to
+70°C
−65°C
to
+150°C
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
T
A
t
S
(H)
t
S
(L)
t
H
(H)
t
H
(L)
t
W
(H)
t
W
(L)
t
W
(L)
t
REC
MR Pulse Width LOW
Recovery Time
MR to CP
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Free Air Operating Temperature
Setup Time HIGH or LOW
D
n
to CP
Hold Time HIGH or LOW
D
n
to CP
CP Pulse Width HIGH or LOW
0
15
15
5
5
20
20
20
15
Parameter
Min
4.75
2
0.8
−0.4
8
70
Nom
5
Max
5.25
Units
V
V
V
mA
mA
°C
ns
ns
ns
ns
ns
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted)
Symbol
V
I
V
OH
V
OL
Parameter
Input Clamp Voltage
HIGH Level
Output Voltage
LOW Level
Output Voltage
I
I
I
IH
I
IL
I
OS
I
CC
Input Current @ Max Input Voltage
HIGH Level Input Current
LOW Level Input Current
Short Circuit Output Current
Supply Current
Conditions
V
CC
=
Min, I
I
= −18
mA
V
CC
=
Min, I
OH
=
Max,
V
IL
=
Max
V
CC
=
Min, I
OL
=
Max,
V
IH
=
Min
I
OL
=
4 mA, V
CC
=
Min
V
CC
=
Max, V
I
=
7V
V
CC
=
Max, V
I
=
2.7V
V
CC
=
Max, V
I
=
0.4V
V
CC
=
Max (Note 3)
V
CC
=
Max
−20
2.7
3.4
0.35
0.25
0.5
0.4
0.1
20
−0.4
−100
27
mA
µA
mA
mA
mA
Min
Typ
(Note 2)
Max
−1.5
Units
V
V
V
Note 2:
All typicals are at V
CC
=
5V, T
A
=
25°C.
Note 3:
Not more than one output should be shorted at a time, and the duration should not exceed one second.
Switching Characteristics
V
CC
= +
5.0V, T
A
=+25°C
C
L
=
15 pF
Symbol
Parameter
Min
f
MAX
t
PLH
t
PHL
t
PLH
Maximum Clock Frequency
Propagation Delay
CP to Q
n
Propagation Delay
MR to Q
n
30
24
24
27
R
L
=
2 kΩ
Max
MHz
ns
ns
Units
3
www.fairchildsemi.com
DM74LS273
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
www.fairchildsemi.com
4
DM74LS273
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
5
www.fairchildsemi.com
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参数对比
与DM74LS273N相近的元器件有：74LS273、DM74LS273、DM74LS273SJ、DM74LS273WM。描述及对比如下：
型号 DM74LS273N 74LS273 DM74LS273 DM74LS273SJ DM74LS273WM
描述 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP20 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP20 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP20 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP20 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP20
系列 LS LS LS LS LS
位数 8 8 8 8 8
功能数量 1 1 1 1 1
端子数量 20 20 20 20 20
输出极性 TRUE TRUE TRUE TRUE TRUE
温度等级 COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
端子形式 THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE GULL WING GULL WING
端子位置 DUAL DUAL DUAL DUAL DUAL
触发器类型 POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE
是否Rohs认证 不符合 - - 不符合 不符合
零件包装代码 DIP - - SOIC SOIC
包装说明 DIP, DIP20,.3 - - 5.30 MM, EIAJ TYPE2, SOP-20 0.300 INCH, MS-013, SOIC-20
针数 20 - - 20 20
Reach Compliance Code unknow - - unknow unknow
JESD-30 代码 R-PDIP-T20 - - R-PDSO-G20 R-PDSO-G20
JESD-609代码 e0 - - e0 e0
长度 26.075 mm - - 12.6 mm 12.8 mm
逻辑集成电路类型 D FLIP-FLOP - - D FLIP-FLOP D FLIP-FLOP
最大频率@ Nom-Su 30000000 Hz - - 30000000 Hz 30000000 Hz
最大I（ol） 0.008 A - - 0.004 A 0.004 A
最高工作温度 70 °C - - 70 °C 70 °C
封装主体材料 PLASTIC/EPOXY - - PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 DIP - - SOP SOP
封装等效代码 DIP20,.3 - - SOP20,.3 SOP20,.4
封装形状 RECTANGULAR - - RECTANGULAR RECTANGULAR
封装形式 IN-LINE - - SMALL OUTLINE SMALL OUTLINE
峰值回流温度（摄氏度） NOT SPECIFIED - - NOT SPECIFIED NOT SPECIFIED
电源 5 V - - 5 V 5 V
最大电源电流（ICC） 27 mA - - 27 mA 27 mA
传播延迟（tpd） 24 ns - - 24 ns 24 ns
认证状态 Not Qualified - - Not Qualified Not Qualified
座面最大高度 5.08 mm - - 2.1 mm 2.65 mm
最大供电电压 (Vsup) 5.25 V - - 5.25 V 5.25 V
最小供电电压 (Vsup) 4.75 V - - 4.75 V 4.75 V
标称供电电压 (Vsup) 5 V - - 5 V 5 V
表面贴装 NO - - YES YES
技术 TTL - - TTL TTL
端子面层 Tin/Lead (Sn/Pb) - - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
端子节距 2.54 mm - - 1.27 mm 1.27 mm
处于峰值回流温度下的最长时间 NOT SPECIFIED - - NOT SPECIFIED NOT SPECIFIED
宽度 7.62 mm - - 5.3 mm 7.5 mm
最小 fmax 30 MHz - - 30 MHz 30 MHz
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器件捷径:
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