FDS6892A
October 2001
FDS6892A
Dual N-Channel Logic Level PWM Optimized PowerTrench
®
MOSFET
General Description
These N-Channel Logic Level MOSFETs are produced
using
Fairchild
Semiconductor’s
advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
superior switching performance.
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
Features
•
7.5 A, 20 V.
R
DS(ON)
= 18 mΩ @ V
GS
= 4.5 V
R
DS(ON)
= 24 mΩ @ V
GS
= 2.5 V
•
Low gate charge (12 nC)
•
High performance trench technology for extremely
low R
DS(ON)
•
High power and current handling capability
D2
D
D2
D
D
D1
D1
D
5
6
7
Q1
4
3
2
Q2
SO-8
Pin 1
SO-8
G2
S2
S
G1
S1
G
S
8
1
S
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Drain-Source Voltage
Gate-Source Voltage
Drain Current
– Continuous
– Pulsed
T
A
=25 C unless otherwise noted
o
Parameter
Ratings
20
±
12
(Note 1a)
Units
V
V
A
W
7.5
30
2
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
1.6
1
0.9
–55 to +150
°C
T
J
, T
STG
Operating and Storage Junction Temperature Range
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
78
40
°C/W
°C/W
Package Marking and Ordering Information
Device Marking
FDS6892A
Device
FDS6892A
Reel Size
13’’
Tape width
12mm
Quantity
2500 units
©2001
Fairchild Semiconductor Corporation
FDS6892A Rev C (W)
FDS6892A
Electrical Characteristics
Symbol
BV
DSS
∆BV
DSS
∆T
J
I
DSS
I
GSSF
I
GSSR
T
A
= 25°C unless otherwise noted
Parameter
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
(Note 2)
Test Conditions
V
GS
= 0 V,
I
D
= 250
µA
I
D
= 250
µA,
Referenced to 25°C
V
DS
= 16 V, V
GS
= 0 V
V
DS
= 16 V, V
GS
= 0 V, T
J
= 55°C
V
GS
= 12 V, V
DS
= 0 V
V
GS
= –12 V, V
DS
= 0 V
V
DS
= V
GS
,
I
D
= 250
µA
I
D
= 250
µA,
Referenced to 25°C
V
GS
= 4.5 V, I
D
= 7.5 A
V
GS
= 2.5 V, I
D
= 6.5 A
V
GS
= 4.5 V,I
D
= 7.5 A,T
J
= 125°C
V
GS
= 4.5V, V
DS
= 5 V
V
DS
= 5 V,
I
D
= 7.5 A
Min
20
Typ
Max Units
V
mV/°C
1
10
100
–100
µA
nA
nA
Off Characteristics
5
On Characteristics
V
GS(th)
∆V
GS(th)
∆T
J
R
DS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
0.6
0.9
–3
13
17
18
1.5
V
mV/°C
mΩ
18
24
27
I
D(on)
g
FS
15
37
A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(Note 2)
V
DS
= 10 V,
f = 1.0 MHz
V
GS
= 0 V,
1333
301
160
pF
pF
pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
V
DD
= 10 V,
V
GS
= 4.5 V,
I
D
= 1 A,
R
GEN
= 6
Ω
8
15
26
9
16
27
42
18
17
ns
ns
ns
ns
nC
nC
nC
V
DS
= 10 V,
V
GS
= 4.5 V
I
D
= 7.5 A,
12
2.5
3
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
V
GS
= 0 V,
I
S
= 1.3 A
(Note 2)
1.3
0.7
1.2
A
V
Notes:
1.
R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θJC
is guaranteed by design while R
θCA
is determined by the user's board design.
a) 78°C/W when
2
mounted on a 0.5in
pad of 2 oz copper
b) 125°C/W when
mounted on a 0.02
2
in pad of 2 oz
copper
c) 135°C/W when mounted on a
minimum mounting pad.
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS6892A Rev C (W)
FDS6892A
Typical Characteristics
40
V
GS
= 4.5V
3.0V 2.5V
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
2.2
2
I
D
, DRAIN CURRENT (A)
30
V
GS
= 2.0V
1.8
1.6
1.4
1.2
1
0.8
0
10
20
I
D
, DRAIN CURRENT (A)
30
40
20
2.0V
2.5V
3.0V
3.5V
4.5V
10
0
0
0.5
1
1.5
2
2.5
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.045
R
DS(ON)
, ON-RESISTANCE (OHM)
1.6
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I
D
= 7.5A
V
GS
= 4.5V
1.4
I
D
= 3.8A
0.04
0.035
0.03
1.2
T
A
= 125 C
0.025
0.02
o
1
0.8
T
A
= 25
o
C
0.015
0.01
0.6
-50
-25
0
25
50
75
100
o
125
150
1
2
3
4
5
T
J
, JUNCTION TEMPERATURE ( C)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
30
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
T
A
= -55 C
25 C
125
o
C
25
I
D
, DRAIN CURRENT (A)
20
15
10
5
0
0.5
1
1.5
2
I
S
, REVERSE DRAIN CURRENT (A)
V
DS
= 5V
o
o
V
GS
= 0V
1
T
A
= 125
o
C
25
o
C
0.1
0.01
-55 C
o
0.001
0.0001
2.5
0
0.2
0.4
0.6
0.8
1
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6892A Rev C (W)
FDS6892A
Typical Characteristics
5
V
GS
, GATE-SOURCE VOLTAGE (V)
2000
I
D
= 7.5A
V
DS
= 5V
10V
15V
CAPACITANCE (pF)
C
ISS
1500
f = 1 MHz
V
GS
= 0 V
4
3
1000
C
OSS
500
2
1
0
0
5
10
15
Q
g
, GATE CHARGE (nC)
C
RSS
0
0
5
10
15
20
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100
100µ
I
D
, DRAIN CURRENT (A)
10
R
DS(ON)
LIMIT
1ms
10ms
100ms
1s
10s
DC
V
GS
= 4.5V
SINGLE PULSE
R
θJA
= 135
o
C/W
T
A
= 25 C
0.01
0.01
0.1
1
10
100
o
Figure 8. Capacitance Characteristics.
50
P(pk), PEAK TRANSIENT POWER (W)
40
SINGLE PULSE
R
θJA
= 135°C/W
T
A
= 25°C
30
1
20
0.1
10
0
0.01
0.1
1
10
100
1000
V
DS
, DRAIN-SOURCE VOLTAGE (V)
t
1
, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
1
D = 0.5
0.2
R
θJA
(t) = r(t) * R
θJA
R
θJA
= 135 C/W
P(pk)
t
1
t
2
T
J
- T
A
= P * R
θJA
(t)
Duty Cycle, D = t
1
/ t
2
o
0.1
0.1
0.05
0.02
0.01
0.01
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
t
1
, TIME (sec)
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6892A Rev C (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E
2
CMOS
TM
EnSigna
TM
FACT™
FACT Quiet Series™
DISCLAIMER
FAST
®
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench
®
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER
®
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET
®
VCX™
STAR*POWER is used under license
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into
support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Advance Information
Product Status
Formative or
In Design
Definition
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
