Fremont Micro Devices
Preliminary FT25H16
FM
© 2014 Fremont Micro Devices Inc.
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Fremont Micro Devices
Preliminary FT25H16
CONTENTS
1. FEATURES ................................................................................................................................................. 4
2. GENERAL DESCRIPTION ......................................................................................................................... 6
3. MEMORY ORGANIZATION ....................................................................................................................... 8
4. DEVICE OPERATION ................................................................................................................................ 9
5. DATA PROTECTION ................................................................................................................................10
6. STATUS REGISTER ................................................................................................................................12
7.1. W
RITE
E
NABLE
(WREN) (06H) ...............................................................................................................18
7.2. W
RITE
D
ISABLE
(WRDI) (04H) ...............................................................................................................18
7.3. R
EAD
S
TATUS
R
EGISTER
(RDSR) (05H
OR
35H).....................................................................................18
7.5. R
EAD
D
ATA
B
YTES
(READ) (03H)...........................................................................................................19
7.6. R
EAD
D
ATA
B
YTES
A
T
H
IGHER
S
PEED
(F
AST
R
EAD
) (0BH) .......................................................................20
7.7. D
UAL
O
UTPUT
F
AST
R
EAD
(3BH) ............................................................................................................20
7.8. Q
UAD
O
UTPUT
F
AST
R
EAD
(6BH) ...........................................................................................................21
7.9. D
UAL
I/O F
AST
R
EAD
(BBH) ...................................................................................................................22
7.10. Q
UAD
I/O F
AST
R
EAD
(EBH).................................................................................................................23
7. 12. P
AGE
P
ROGRAM
(PP) (02H) ................................................................................................................25
7. 13.Q
UAD
P
AGE
P
ROGRAM
(QPP) (32H).....................................................................................................26
7.15. 32KB B
LOCK
E
RASE
(BE) (52H)...........................................................................................................28
7.16. 64KB B
LOCK
E
RASE
(BE) (D8H) ..........................................................................................................28
7.17. C
HIP
E
RASE
(CE) (60/C7H) .................................................................................................................29
7.18. D
EEP
P
OWER
-D
OWN
(DP) (B9H) .........................................................................................................29
7.19. R
ELEASE FROM
D
EEP
P
OWER
-D
OWN
A
ND
R
EAD
D
EVICE
ID (RDI) (ABH) ...............................................30
7.14. S
ECTOR
E
RASE
(SE) (20H) ..................................................................................................................27
FM
7.20. R
EAD
M
ANUFACTURE
ID/ D
EVICE
ID (REMS) (90H) ..............................................................................31
7.21. R
EAD
I
DENTIFICATION
(RDID) (9FH) .....................................................................................................32
7.22. H
IGH
S
PEED
M
ODE
(HSM) (A3H) .........................................................................................................32
7.23. C
ONTINUOUS
R
EAD
M
ODE
R
ESET
(CRMR) (FFH) .................................................................................33
7.24. P
ROGRAM
/E
RASE
S
USPEND
(PES) (75H) .............................................................................................33
7.25. P
ROGRAM
/E
RASE
R
ESUME
(PER) (7AH) ..............................................................................................34
7.26. E
RASE
S
ECURITY
R
EGISTERS
(44H) .....................................................................................................34
7.27. P
ROGRAM
S
ECURITY
R
EGISTERS
(42H) ................................................................................................35
7.28. R
EAD
S
ECURITY
R
EGISTERS
(48H) .......................................................................................................36
8. ELECTRICAL CHARACTERISTICS ........................................................................................................37
8.1. P
OWER
-
ON
T
IMING
.................................................................................................................................37
8.2. I
NITIAL
D
ELIVERY
S
TATE
........................................................................................................................37
8.3. D
ATA
R
ETENTION AND
E
NDURANCE
.........................................................................................................37
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7.11. Q
UAD
I/O W
ORD
F
AST
R
EAD
(E7H).......................................................................................................24
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7.4. W
RITE
S
TATUS
R
EGISTER
(WRSR) (01H) ...............................................................................................19
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7. COMM ANDS DESCRIPTION..................................................................................................................14
Fremont Micro Devices
Preliminary FT25H16
8.4. L
ATCH UP
C
HARACTERISTICS
..................................................................................................................37
8.5. A
BSOLUTE
M
AXIMUM
R
ATINGS
................................................................................................................38
8.6. C
APACITANCE
M
EASUREMENT
C
ONDITION
...............................................................................................38
8.7. DC C
HARACTERISTICS
............................................................................................................................39
8.8. AC C
HARACTERISTICS
............................................................................................................................40
9. ORDERING INFORMATION ....................................................................................................................42
10. PACKAGE INFORMATION ....................................................................................................................43
10.1.P
ACKAGE
SOP8 150MIL .......................................................................................................................43
10.2. P
ACKAGE
SOP8 208MIL ......................................................................................................................44
10.3. P
ACKAGE
DIP8 300MIL .......................................................................................................................45
10.5. P
ACKAGE
TSSOP8 173MIL .................................................................................................................47
11. REVISION HISTORY ..............................................................................................................................48
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10.4. P
ACKAGE
VSOP8 208MIL....................................................................................................................46
Fremont Micro Devices
Preliminary FT25H16
1. FEATURES
16M -bit Serial Flash
2048K-byte
256 bytes per programmable page
Standard, Dual, Quad SPI
Standard SPI: SCLK, CS#, SI, SO, WP#, HOLD#
Dual SPI: SCLK, CS#, IO0, IO1, WP#, HOLD#
Quad SPI: SCLK, CS#, IO0, IO1, IO2, IO3
High Speed Clock Frequency
120MHz for fast read with 30PF load
Dual I/O Data transfer up to 240Mbits/s
Quad I/O Data transfer up to 480Mbits/s
Program/Erase Speed
Page Program time: 0.4ms typical
Sector Erase time: 120ms typical
Block Erase time: 0.2/0.4s typical
Chip Erase time: 10s typical
Flexible Architecture
Sector of 4K-byte
Block of 32/64k-byte
Low Power Consumption
5uA maximum power down current
FM
Software/Hardware Write Protection
Write protect all/portion of memory via software
Enable/Disable protection with WP# Pin
Top or Bottom, Sector or Block selection
Advanced security Features
4*256-Byte Security Registers With OTP Lock
Single Power Supply Voltage: Full voltage range:2.7~3.6V
Minimum 100,000 Program/Erase Cycle
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Fremont Micro Devices
Hardware Features
8-pin SOP8 (150mil)
8-pin SOP8 (208mil)
8-pin DIP8 (300mil)
8-pin VSOP8 (200mil)
8-pin TSSOP8 (173mil)
Preliminary FT25H16
FM
© 2014 Fremont Micro Devices Inc.
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