The documentation and process conversion
measures necessary to comply with this revision
shall be completed by 21 August 2010.
INCH-POUND
MIL-PRF-19500/702C
21 May 2010
SUPERSEDING
MIL-PRF-19500/702B
30 May 2007
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, FIELD EFFECT RADIATION HARDENED
(TOTAL DOSE AND SINGLE EVENT EFFECTS)
TRANSISTOR, N-CHANNEL, SILICON, TYPES 2N7482T3, 2N7483T3, AND 2N7484T3,
JANTXVR, F, G, AND H AND JANSR, F, G, AND H
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for an N-Channel, enhancement-mode,
MOSFET, radiation hardened (total dose and single event effects (SEE)), power transistor. Two levels of product
assurance are provided for each device type as specified in MIL-PRF-19500, with avalanche energy maximum rating
(E
AS
) and maximum avalanche current (I
AS
). See 6.5 for JANHC and JANKC die versions.
1.2 Physical dimensions. See figure 1, (TO-257AA, T3).
1.3 Maximum ratings. T
A
= +25°C, unless otherwise specified.
Type
P
T
(1)
T
C
=
+25°C
W
2N7482T3
2N7483T3
2N7484T3
75
75
75
P
T
T
A
=
+25°C
W
1.56
1.56
1.56
R
θJC
(2)
V
DS
V
DG
V
GS
I
D1
(3) (4)
T
C
= +25°C
I
D2
(3) (4)
T
C
=
+100°C
A dc
18
18
14
I
S
I
DM
(5)
T
J
and
T
STG
°C
-55
to
+150
°C/W
1.67
1.67
1.67
V dc
30
60
100
V dc
30
60
100
V dc
±20
±20
±20
A dc
18
18
18
A dc
18
18
18
A (pk)
72
72
72
(1) Derate linearly 0.6 W/°C for T
C
> +25°C.
(2) See figure 2, thermal impedance curves.
(3) The
following formula derives the maximum theoretical I
D
specs. I
D
is limited to 18A by package
and device construction.
I
D
=
(
R
θ
JC
T
JM
- T
C
)
x
(
R
DS
( on ) at T
JM
)
(4) See figure 3, maximum drain current graph.
(5) I
DM
= 4 X I
D1
, as defined in note (3).
* Comments, suggestions, or questions on this document should be addressed to Defense Supply Center,
Columbus, ATTN: DSCC-VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to
Semiconductor@dscc.dla.mil.
Since contact information can change, you may want to verify the currency of
this address information using the ASSIST Online database at
https://assist.daps.dla.mil/.
AMSC N/A
FSC 5961
MIL-PRF-19500/702C
1.4 Primary electrical characteristics at T
C
= +25°C.
Type
Min V
(BR)DSS
V
GS
= 0
I
D
= 1.0mA dc
V dc
2N7482T3
2N7483T3
2N7484T3
30
60
100
V
GS(TH)1
V
DS
≥
V
GS
I
D
= 1.0 mA dc
V dc
Min
Max
2.0
4.0
2.0
4.0
2.0
4.0
Max I
DSS1
V
GS
= 0
V
DS
= 80 percent of
rated V
DS
µA
dc
10
10
10
Max r
DS(on)
(1)
V
GS
= 12V, I
D
= I
D2
T
J
= +25°C
Ω
0.030
0.040
0.070
T
J
= +150°C
Ω
0.060
0.080
0.160
mJ
177
110
87
E
AS
(1) Pulsed (see 4.5.1).
2. APPLICABLE DOCUMENTS
2.1 General. The documents listed in this section are specified in sections 3, 4, or 5 of this specification. This
section does not include documents cited in other sections of this specification or recommended for additional
information or as examples. While every effort has been made to ensure the completeness of this list, document
users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this
specification, whether or not they are listed.
2.2 Government documents.
2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a
part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are
those cited in the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATIONS
MIL-PRF-19500
-
Semiconductor Devices, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-750
-
Test Methods for Semiconductor Devices.
* (Copies of these documents are available online at
https://assist.daps.dla.mil/quicksearch/
or
https://assist.daps.dla.mil/
or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D,
Philadelphia, PA 19111-5094.)
2.3 Order of precedence. Unless otherwise noted herein or in the contract, in the event of a conflict between the
text of this document and the references cited herein, the text of this document takes precedence. Nothing in this
document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.
2
MIL-PRF-19500/702C
Symbol
BL
CH
LD
LL
LO
LS
MHD
MHO
TL
TT
TW
TERM
1
TERM
2
TERM
3
*
Dimensions
Inches
Millimeters
Min
Max
Min
Max
.410
.430
10.41 10.92
.190
.200
4.83
5.08
.025
.035
0.64
0.89
.500
.625
12.70 15.88
.120
3.05
.100 BSC
2.54
.140
.150
3.56
3.81
.527
.537
13.39 13.64
.645
.665
16.38 16.89
.035
.045
.889
1.14
.410
.420
10.41 10.67
Drain
Source
Gate
TO-257
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. All terminals are isolated from case.
4. In accordance with ASME Y14.5M, diameters are equivalent to
φx
symbology.
5. Protrusion thickness of ceramic eyelets included in dimension LL.
* FIGURE 1. Dimensions and configuration (TO-257AA, T3).
3
MIL-PRF-19500/702C
3. REQUIREMENTS
3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein.
3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a
manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturer's list (QML)
before contract award (see 4.2 and 6.3).
3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as
specified in MIL-PRF-19500.
3.4 Interface and physical dimensions. The interface and physical dimensions shall be as specified in
MIL-PRF-19500 and on figure 1 (TO-257AA, T3) herein.
3.4.1 Lead finish. Unless otherwise specified, lead finish shall be solderable in accordance with
MIL-PRF-19500, MIL-STD-750, and herein. Where a choice of lead finish is desired, it shall be specified in the
acquisition document (see 6.2).
3.4.2 Internal construction. Multiple chip construction shall not be permitted.
3.5 Electrostatic discharge protection. The devices covered by this specification require electrostatic discharge
protection.
3.5.1 Handling. MOS devices must be handled with certain precautions to avoid damage due to the accumulation
of static charge. However, the following handling practices are recommended (see 3.5).
a. Devices should be handled on benches with conductive handling devices.
b. Ground test equipment, tools, and personnel handling devices.
c. Do not handle devices by the leads.
d. Store devices in conductive foam or carriers.
e. Avoid use of plastic, rubber, or silk in MOS areas.
f. Maintain relative humidity above 50 percent if practical.
g. Care should be exercised during test and troubleshooting to apply not more than maximum rated
voltage to any lead.
h. Gate must be terminated to source, R
≤
100 kΩ, whenever bias voltage is to be applied drain to source.
3.6 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance
characteristics are as specified in 1.3, 1.4, and table I herein.
3.7 Electrical test requirements. The electrical test requirements shall be as specified in table I.
3.8 Marking. Marking shall be in accordance with MIL-PRF-19500.
3.9 Workmanship. Semiconductor devices shall be processed in such a manner as to be uniform in quality and
shall be free from other defects that will affect life, serviceability, or appearance.
4
MIL-PRF-19500/702C
4. VERIFICATION
4.1 Classification of inspections. The inspection requirements specified herein are classified as follows:
a. Qualification inspection (see 4.2).
b. Screening (see 4.3).
c. Conformance inspection (see 4.4, table I and II).
* 4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500 and as specified
herein.
4.2.1 Group E qualification. Group E inspection shall be performed for qualification or re-qualification only. In
case qualification was awarded to a prior revision of the specification sheet that did not request the performance of
table III tests, the tests specified in table III herein that were not performed in the prior revision shall be performed on
the first inspection lot of this revision to maintain qualification.
4.2.1.1 SEE. Design capability shall be tested on the initial qualification and thereafter whenever a major die
design or process change is introduced. See design safe operation area figures herein. End-point measurements
shall be in accordance with table III.
5
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