DATASHEET
KAD5514P
14-Bit, 250/210/170/125MSPS ADC
The KAD5514P is a family of low-power, high performance
14-bit, analog-to-digital converters. Designed with Intersil’s
proprietary FemtoCharge™ technology on a standard CMOS
process, the family supports sampling rates of up to
250MSPS. The KAD5514P is part of a pin-compatible portfolio
of 10, 12 and 14-bit A/Ds with sample rates ranging from
125MSPS to 500MSPS.
A Serial Peripheral Interface (SPI) port allows for extensive
configurability, as well as fine control of various parameters
such as gain and offset.
Digital output data is presented in selectable LVDS or CMOS
formats. The KAD5514P is available in 72 Ld and 48 Ld QFN
packages with an exposed paddle. Operating from a 1.8V
supply, performance is specified across the full industrial
temperature range (-40°C to +85°C).
FN6804
Rev 3.00
May 31, 2016
Features
• Programmable gain, offset and skew control
• 950MHz analog input bandwidth
• 60fs clock jitter
• Over-range indicator
• Selectable clock divider: ÷1, ÷2 or ÷4
• Clock phase selection
• Nap and sleep modes
• Two’s complement, gray code or binary data format
• DDR LVDS-compatible or LVCMOS outputs
• Programmable built-in test patterns
• Single-supply 1.8V operation
• Pb-free (RoHS compliant)
Key Specifications
• SNR = 69.4dBFS for f
IN
= 105MHz (-1dBFS)
• SFDR = 82.2dBc for f
IN
= 105MHz (-1dBFS)
• Total Power Consumption
- 429/345mW at 250/125MSPS (SDR Mode)
- 390/309mW at 250/125MSPS (DDR Mode)
Applications
• Power amplifier linearization
• Radar and satellite antenna array processing
• Broadband communications
• High-performance data acquisition
• Communications test equipment
• WiMAX and microwave receivers
CLKDIV
C LK P
CLKN
OVDD
AVDD
C LO C K
G E N E R A TIO N
C LK O U TP
C LK O U TN
D [13:0]P
V IN P
SH A
VIN N
VCM
1.25V
14-B IT
250 M S P S
ADC
D IG ITA L
ERROR
C O R R E C TIO N
LV D S/C M O S
D R IV ER S
D [13:0]N
ORP
ORN
O U TF M T
O U TM O D E
+
–
S PI
C O N TR O L
NAPSLP
SCLK
CSB
SDIO
SDO
FIGURE 1. BLOCK DIAGRAM
FN6804 Rev 3.00
May 31, 2016
OVSS
AVSS
Page 1 of 34
KAD5514P
Table of Contents
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Digital Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Switching Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Pin Descriptions - 72 QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Pin Descriptions - 48 QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Typical Performance Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Theory of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power-On Calibration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
User-Initiated Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clock Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Jitter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Over-Range Indicator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Nap/Sleep. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Serial Peripheral Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPI Physical Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPI Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Device Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Indexed Device Configuration/Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Global Device Configuration/Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Device Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPI Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17
17
17
18
18
19
19
20
20
20
20
20
21
21
22
24
24
24
25
26
27
Equivalent Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
72 Ld/48 Ld Package Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
ADC Evaluation Platform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Layout Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Split Ground and Power Planes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clock Input Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Exposed Paddle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bypass and Filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LVDS Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LVCMOS Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Unused Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
30
30
30
30
30
30
30
30
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
L48.7x7E. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
L72.10x10D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
FN6804 Rev 3.00
May 31, 2016
Page 2 of 34
KAD5514P
Ordering Information
PART NUMBER
(Note
3)
KAD5514P-25Q72 (Note
1)
KAD5514P-21Q72 (Note
1)
KAD5514P-17Q72 (Note
1)
KAD5514P-12Q72
Note 1)
KAD5514P-25Q48 (Note
2)
KAD5514P-21Q48 (Note
2)
KAD5514P-17Q48 (Note
2)
KAD5514P-12Q48 (Note
2)
NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate-e4
termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
KAD5514P-25, KAD5514P-21, KAD5514P-17, KAD5514P-12.
For more
information on MSL please see techbrief
TB363.
TABLE 1. PIN-COMPATIBLE FAMILY
MODEL
KAD5514P-25
KAD5514P-21
KAD5514P-17
KAD5514P-12
KAD5512P-50
KAD5512P-25, KAD5514P-25
KAD5512P-21, KAD5514P-21
KAD5512P-17, KAD5514P-17
KAD5512P-12, KAD5514P-12
KAD5510P-50
RESOLUTION
14
14
14
14
12
12
12
12
12
10
SPEED
(MSPS)
250
210
170
125
500
250
210
170
125
500
PART
MARKING
KAD5514P-25 Q72EP-I
KAD5514P-21 Q72EP-I
KAD5514P-17 Q72EP-I
KAD5512P-12 Q72EP-I
KAD5512P-25 Q48EP-I
KAD5514P-21 Q48EP-I
KAD5514P-17 Q48EP-I
KAD5514P-12 Q48EP-I
SPEED
(MSPS)
250
210
170
125
250
210
170
125
TEMP. RANGE
(°C)
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
PACKAGE
(RoHS Compliant)
72 Ld QFN
72 Ld QFN
72 Ld QFN
72 Ld QFN
48 Ld QFN
48 Ld QFN
48 Ld QFN
48 Ld QFN
PKG.
DWG. #
L72.10X10D
L72.10X10D
L72.10X10D
L72.10X10D
L48.7X7E
L48.7X7E
L48.7X7E
L48.7X7E
FN6804 Rev 3.00
May 31, 2016
Page 3 of 34
KAD5514P
Absolute Maximum Ratings
AVDD to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to 2.1V
OVDD to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to 2.1V
AVSS to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V
Analog Inputs to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V
Clock Inputs to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V
Logic Input to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V
Logic Inputs to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V
Thermal Information
Thermal Resistance (Typical,
Note 4)
JA
(°C/W)
48 Ld QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
72 Ld QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see
TB493
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTE:
4.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379
for details.
All specifications apply under the following conditions unless otherwise noted: AVDD = 1.8V, OVDD = 1.8V,
T
A
= -40°C to +85°C (typical specifications at +25°C), A
IN
= -1dBFS, f
SAMPLE
= maximum conversion rate (per speed grade).
TEST
CONDITIONS
KAD5514P-25
(Note
8)
MIN
TYP
MAX
KAD5514P-21
(Note
8)
MIN
TYP
MAX
KAD5514P-17
(Note
8)
MIN
TYP
MAX
KAD5514P-12
(Note
8)
MIN
TYP
MAX
UNIT
Electrical Specifications
PARAMETER
DC SPECIFICATIONS
Analog Input
Full-Scale Analog
Input Range
Input Resistance
Input Capacitance
Full-Scale Range
Temperature Drift
Input Offset Voltage
Gain Error
Common-Mode
Output Voltage
Clock Inputs
Inputs Common-Mode
Voltage
CLKP, CLKN Input
Swing
Power Requirements
1.8V Analog Supply
Voltage
1.8V Digital Supply
Voltage
1.8V Analog Supply
Current
1.8V Digital Supply
Current (Note
5)
(SDR)
1.8V Digital Supply
Current (Note
5)
(DDR)
Power Supply
Rejection Ratio
SYMBOL
V
FS
R
IN
C
IN
A
VTC
V
OS
E
G
V
CM
Differential
Differential
Differential
Full
Temperature
1.4
1.47
500
2.6
90
1.54
1.4
1.47
500
2.6
90
1.54
1.4
1.47
500
2.6
90
1.54
1.4
1.47
500
2.6
90
1.54
V
P-P
Ω
pF
ppm/
°C
-10
±2
±0.6
10
-10
±2
±0.6
10
-10
±2
±0.6
10
-10
±2
±0.6
10
mV
%
435
535
635
435
535
635
435
535
635
435
535
635
mV
0.9
1.8
0.9
1.8
0.9
1.8
0.9
1.8
V
V
AVDD
OVDD
I
AVDD
I
OVDD
I
OVDD
PSRR
3mA LVDS
3mA LVDS
30MHz,
200mV
P-P
signal on AVDD
1.7
1.7
1.8
1.8
170
68
46
-36
1.9
1.9
190
76
1.7
1.7
1.8
1.8
157
66
44
-36
1.9
1.9
176
74
1.7
1.7
1.8
1.8
145
64
43
-36
1.9
1.9
163
72
1.7
1.7
1.8
1.8
129
62
42
-36
1.9
1.9
147
70
V
V
mA
mA
mA
dB
FN6804 Rev 3.00
May 31, 2016
Page 4 of 34
KAD5514P
All specifications apply under the following conditions unless otherwise noted: AVDD = 1.8V, OVDD = 1.8V,
T
A
= -40°C to +85°C (typical specifications at +25°C), A
IN
= -1dBFS, f
SAMPLE
= maximum conversion rate (per speed grade). (Continued)
TEST
CONDITIONS
KAD5514P-25
(Note
8)
MIN
TYP
MAX
KAD5514P-21
(Note
8)
MIN
TYP
MAX
KAD5514P-17
(Note
8)
MIN
TYP
MAX
KAD5514P-12
(Note
8)
MIN
TYP
MAX
UNIT
Electrical Specifications
PARAMETER
Total Power Dissipation
Normal Mode (SDR)
Normal Mode (DDR)
Nap Mode
Sleep Mode
Nap Mode Wake-Up
Time (Note
6)
Sleep Mode Wake-Up
Time (Note
6)
AC SPECIFICATIONS
Differential
Nonlinearity
Integral Nonlinearity
Minimum Conversion
Rate (Note
7)
Maximum Conversion
Rate
Signal-to-Noise Ratio
SYMBOL
P
D
P
D
P
D
P
D
3mA LVDS
3mA LVDS
429
390
148
463
402
363
433
378
339
406
345
309
376
mW
mW
170.2
6
142
2
1
1
164.2
6
136
2
1
1
158.2
6
129
2
1
1
150.2
6
mW
mW
µs
ms
CSB at logic
high
Sample Clock
Running
Sample Clock
Running
2
1
1
DNL
INL
f
S
MIN
f
S
MAX
SNR
f
IN
= 10MHz
f
IN
= 105MHz
f
IN
= 190MHz
f
IN
= 364MHz
f
IN
= 695MHz
f
IN
= 995MHz
-1.0
±0.3
±3.5
1.0
-1.0
±0.3
±3.5
1.0
-1.0
±0.3
±3.5
1.0
-1.0
±0.3
±5.0
1.0
LSB
LSB
40
250
69.5
66.9
69.4
68.9
67.6
64.9
62.6
69.4
66.4
69.1
68.4
66.7
59.0
48.2
11.2
10.8
11.2
11.1
10.8
9.5
7.7
210
70.2
67.4 70.2
69.4
68.1
65.1
62.9
70.2
66.9 70.2
69.1
67.0
58.9
48.2
11.4
10.9 11.4
11.2
10.8
9.5
7.7
40
170
70.6
68.1
70.4
70.0
68.9
66.3
64.1
70.5
67.6
70.1
69.4
67.6
60.1
49.1
11.4
11.0
11.4
11.2
10.9
9.7
7.9
40
125
70.9
68.
4
70.7
70.1
68.7
65.7
63.4
70.7
67.6
70.3
69.7
67.6
59.9
50.4
11.5
11.
0
11.4
11.3
10.9
9.7
8.1
40
MSPS
MSPS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
Bits
Bits
Bits
Bits
Bits
Bits
Signal-to-Noise and
Distortion
SINAD
f
IN
= 10MHz
f
IN
= 105MHz
f
IN
= 190MHz
f
IN
= 364MHz
f
IN
= 695MHz
f
IN
= 995MHz
Effective Number of
Bits
ENOB
f
IN
= 10MHz
f
IN
= 105MHz
f
IN
= 190MHz
f
IN
= 364MHz
f
IN
= 695MHz
f
IN
= 995MHz
FN6804 Rev 3.00
May 31, 2016
Page 5 of 34
