Dear customers,
About the change in the name such as "Oki Electric Industry Co. Ltd." and
"OKI" in documents to OKI Semiconductor Co., Ltd.
The semiconductor business of Oki Electric Industry Co., Ltd. was succeeded to OKI
Semiconductor Co., Ltd. on October 1, 2008.
Therefore, please accept that although
the terms and marks of "Oki Electric Industry Co., Ltd.", “Oki Electric”, and "OKI"
remain in the documents, they all have been changed to "OKI Semiconductor Co., Ltd.".
It is a change of the company name, the company trademark, and the logo, etc. , and
NOT a content change in documents.
October 1, 2008
OKI Semiconductor Co., Ltd.
550-1 Higashiasakawa-cho, Hachioji-shi, Tokyo 193-8550, Japan
http://www.okisemi.com/en/
FEUL66525-02
ML66525 Family
User’s Manual
CMOS 16-bit microcontroller
Issue Date: July 26, 2002
Preface
This user’s manual describes the hardware of Oki-original CMOS 16-bit microcontrollers ML66525 family. In addition
to this manual, Oki also provides the following manuals which should be read with regard to the ML66525 family.
nX-8/500S Core Instruction Manual
•
nX-8/500S core instruction set
•
Addressing modes
CC665S User’s Manual
•
Optimized compiler CC665S operation
•
C-language specifications in CC665S
CL665S User’s Manual
•
Compiler loader CL665S operation
RTL665S Run Time Library Reference
•
C run time library explanation
MAC66K Assembler Package User’s Manual
•
Package overview
•
RAS66K (relocatable assembler) operation
•
RAS66K assembly language explanation
•
RL66K (linker) operation
•
LIB66K (librarian) operation
•
OH66K (object converter) operation
Macroprocessor MP User’s Manual
•
MP operation
•
Macro language
Ultra-66K/E502 User’s Manual
•
Ultra-66K (Emulator) explanation
•
PathFinder-66K (Debugger) explanation
PW66K Flash Writer System User’s Manual
•
PW66K Flash Writer System operation
This document is subject to change without notice.
Notation
Classification
■
Numeric value
■
Unit
Notation
xxH, xxhex
xxb
Word, W
byte, B
nibble, N
mega-, M
kilo-, K
kilo-, k
milli-, m
micro-,
µ
nano-, n
second, s
KB
MB
Description
Represents a hexadecimal number
Represents a binary number
1 word = 16 bits
1 byte = 2 nibbles = 8 bits
1 nibble = 4 bits
10
6
2
10
= 1024
10
3
= 1000
10
–3
10
–6
10
–9
second
1 KB = 1 kilobyte = 1024 bytes
1 MB = 1 megabyte = 2
20
bytes
= 1,048,576 bytes
The signal level of the high side of the voltage; indicates the
voltage level of V
IH
and V
OH
described in the electrical
characteristics.
The signal level of the low side of the voltage; indicates
voltage level of V
IL
and V
OL
described in the electrical
characteristics.
Operation code trap. Occurs when an empty area that has
not been assigned an instruction is fetched, or when an
instruction code combination that does not contain an
instruction is addressed.
■
Terminology
“H” level
“L” level
Opcode trap
■
Register description
Register name Invalid bit
Fixed bit
Bit name Bit number
7
6
SCNC0
5
SNEX0
4
ADRUN0
3
“0”
2
0
1
0
0
0
ADCON0L
At reset
—
1
ADSNM02 ADSNM01 ASSNM00
Address: 009C [H]
R/W access: R/W
0
0
0
0
Initial value when reset
Read/Write attribute
: Indicates that the bit does not exist. Writing into this bit is invalid.
: When writing, always write the specified value. If read, the specified value will be read.
Values of fixed bits are specified as “0” or “1”.
Read/write attribute : R indicates that reading is possible and W indicates that writing is possible.
Invalid bit
Fixed bit
Contents
Chapter 1
Overview
1.1 Overview............................................................................................................................ 1-1
1.2 Features .............................................................................................................................. 1-1
1.3 Block Diagram ................................................................................................................... 1-5
1.4 Pin Configuration (Top View) ........................................................................................... 1-6
1.5 Pin Descriptions ................................................................................................................. 1-8
1.5.1
Description of Each Pin ............................................................................................. 1-8
1.5.2
Pin Configuration..................................................................................................... 1-11
1.5.3
Connections for Unused Pins ................................................................................... 1-12
1.6 Basic Operational Timing ................................................................................................ 1-13
Chapter 2
CPU Architecture
2.1 Overview............................................................................................................................ 2-1
2.2 Memory Space ................................................................................................................... 2-1
2.2.1
Memory Space Expansion ......................................................................................... 2-1
2.2.2
Program Memory Space............................................................................................. 2-3
(1)
Accessing program memory space............................................................................. 2-5
(2)
Vector table area ........................................................................................................ 2-5
(3)
VCAL table area ........................................................................................................ 2-7
(4)
ACAL area ................................................................................................................. 2-8
2.2.3
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
2.2.4
(1)
(2)
Data Memory Space................................................................................................... 2-9
Special function register (SFR) area ........................................................................ 2-11
Reserved area ........................................................................................................... 2-11
Internal RAM area ................................................................................................... 2-11
Fixed page (FIX) area .............................................................................................. 2-11
Local register setting area ........................................................................................ 2-13
External data memory area ...................................................................................... 2-13
Common area ........................................................................................................... 2-14
EXPANDED RAM area .......................................................................................... 2-14
Data Memory Access ............................................................................................... 2-15
Byte operations ........................................................................................................ 2-15
Word operations....................................................................................................... 2-15
2.3 Registers........................................................................................................................... 2-16
2.3.1
Arithmetic Register (ACC) ...................................................................................... 2-16
2.3.2
Control Registers ..................................................................................................... 2-17
Contents - 1