MP7610
Octal 14-Bit DAC Array
TM
D/A Converter with Output Amplifier
and Serial Data/Address
mP
Control Logic
June 1998-3
FEATURES
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Eight Independent 14-Bit DACs with Output Amplifiers
Low Power 320 mW (typ.)
Serial Digital Data and Address Port (3-Wire Standard)
14-Bit Resolution, 12-Bit Accuracy
Extremely Well Matched DACs
Extremely Low Analog Ground Current (<60mA/Channel)
+10 V Output Swing with +11.4 V Supplies
Zero Volt Output Preset (Data = 10 .. 00)
Rugged Construction -- Latch-Up Free
Parallel Version: MP7611
APPLICATIONS
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Data Acquisition Systems
ATE
Process Control
Self-Diagnostic Systems
Logic Analyzers
Digital Storage Scopes
PC Based Controller/DAS
GENERAL DESCRIPTION
The MP7610 provides eight independent 14-bit resolution
Digital-to-Analog Converters with voltage output
amplifiers and a 3-wire standard serial digital address and
data port.
The output amplifier is capable of sinking and sourcing
5mA, and the output voltage settles to 12-bits in less than
30ms (typ.).
The MP7610 is equipped with a serial data (3-wire
standard)
m-processor
logic interface to reduce pin count,
package size, and board space.
Built using an advanced linear BiCMOS, these devices
offer rugged solutions that are latch-up free, and take
advantage of EXAR’s patented thin-film resistor process
which exhibits excellent long term stability and reliability.
SIMPLIFIED BLOCK DIAGRAM
V
RP
V
RP
--
+
V
RN
D
Q
14
RST
XE0 - XE7
Not Used
8
LD
8
LAT0
XR XE
XE0
DAC0
+
--
VO0
V
RN
14
V
RP
D
Q
LAT7
XR XE
XE7
14
DAC7
+
--
4 to 16 Decoder
SDI
LD
CLK
D
EN
LAT
Q
LAT
D
Q
EN
4
VO7
V
RN
D0 to D13
A0 to A3
18-Bit Shift Register
Tri-State Buffer
V
RP
AGND
AGND V
REF
DGND DV
DD
LD
SDO
V
EE
V
EE
V
CC
V
CC
Rev. 4.01
E1998
1
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538
z
(510) 668-7000
z
(510) 668-7017
MP7610
ORDERING INFORMATION
Package
Type
PLCC
PLCC
PLCC
SOIC
SOIC
SOIC
Temperature
Range
0 to +70
°
C
--40 to +85
°
C
--40 to +85
°
C
0 to +70
°
C
--40 to +85
°
C
--40 to +85
°
C
Part No.
MP7610CP
MP7610BP
MP7610AP
MP7610CS
MP7610BS
MP7610AS
Res.
(Bits)
14
14
14
14
14
14
INL
(LSB)
¦2
¦4
¦8
¦4
¦2
¦8
DNL
(LSB)
¦2
¦3
¦4
¦3
¦2
¦4
FSE
(LSB)
¦16
¦24
¦32
¦24
¦16
¦32
PIN CONFIGURATIONS
1
AGND
VO0
VO1
VO2
VO3
V
EE
V
CC
V
REF
V
CC
V
EE
VO4
VO5
VO6
VO7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
See the following page for
pin descriptions
DGND
N/C
N/C
DV
DD
N/C or DV
DD
N/C
SDO
SDI
CLK
LD
N/C
RST
N/C
AGND
44 Pin PLCC
28 Pin SOIC (Jedec, 0.346”)
Rev. 4.01
2
MP7610
PIN DESCRIPTION
SOIC
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
1, 8, 10, 11, 14,
16, 17, 22, 23,
25, 27, 28, 30,
33, 35, 36, 38,
39, 41, 42, 43
44
37
40
29
31
32
34
26
PLCC
Pin #
2
3
4
5
6
7
9
12
13
15
18
19
20
21
24
Symbol
AGND
VO0
VO1
VO2
VO3
V
EE
V
CC
V
REF
V
CC
V
EE
VO4
VO5
VO6
VO7
AGND
N/C
RST
N/C
LD
CLK
SDI
SDO
N/C
N/C
DV
DD
N/C
N/C
Description
Analog Ground
DAC 0 Output
DAC 1 Output
DAC 2 Output
DAC 3 Output
Analog Negative Power Supply (--12 V)
Analog Positive Power Supply (+12 V)
Voltage Reference Input (+5 V)
Analog Positive Power Supply (+12 V)
Analog Negative Power Supply (--12 V)
DAC 4 Output
DAC 5 Output
DAC 6 Output
DAC 7 Output
Analog Ground
No Connection
Reset all DACs to 0 V Output
No Connection
Load Signal; Load Data to Selected DAC
Serial Data Clock
Serial Data Input
Shift Register Serial Output
No Connection
No Connection or DV
DD
Digital Positive Power Supply (+5 V)
No Connection
No Connection
28
DGND
Digital Ground
Rev. 4.01
3
MP7610
ELECTRICAL CHARACTERISTICS
V
CC
= +12 V, V
EE
= --12 V, V
REF
= 5 V, DV
DD
= 5.0 V, T = 25°C, Output Load = 5kW (unless otherwise noted)
Parameter
STATIC PERFORMANCE
Resolution (All Grades)
Integral Non-Linearity
(Relative Accuracy)
A
B
C
Differential Non-Linearity
A
B
C
Positive Full Scale Error
A
B
C
Positive Full Scale Error
Temperature Coefficient
Negative Full Scale Error
A
B
C
Negative Full Scale Error
Temperature Coefficient
Bipolar Zero Offset
A
B
C
Bipolar Zero Offset
Temperature Coefficient
INL Matching
A
B
C
N
INL
¦8
¦4
¦2
DNL
¦4
¦3
¦2
+FSE
24
16
12
D+FSE/
DT
--FSE
24
16
12
D--FSE/
DT
ZOFS
¦16
¦12
¦12
DZOFS/
DT
DINL
¦8
¦6
¦6
¦8
¦6
¦6
LSB
¦16
¦8
¦6
¦16
¦12
¦12
DFSE
¦16
¦12
¦12
¦16
¦12
¦12
¦16
¦8
¦6
LSB
¦16
¦12
¦12
LSB
2
¦16
¦12
¦12
ppm/°C
LSB
0°C to 85°C
4
¦32
¦24
¦16
¦32
¦24
¦16
ppm/°C
LSB
0°C to 85°C
4
¦32
¦24
¦16
¦32
¦24
¦16
ppm/°C
LSB
0°C to 85°C
¦4
¦3
¦2.5
LSB
¦8
¦4
¦2.5
LSB
14
Bits
LSB
End Point Linearity Spec
Symbol
Min
25
°
C
Typ
Max
Tmin to Tmax
Min
Max
Units
Test Conditions/Comments
All Channels Maximum Error
ME
with DAC 0 adjusted to minimum error
A
B
C
Bipolar Zero Matching
A
B
C
Full Scale Error Matching
A
B
C
DZOFS
Rev. 4.01
4
MP7610
ELECTRICAL CHARACTERISTICS (CONT’D)
Parameter
DYNAMIC PERFORMANCE
Voltage Settling from LD
to VDAC Out
1
Channel-to-Channel Crosstalk
6
Digital Feedthrough
1, 6
Power Supply Rejection Ratio
REFERENCE INPUTS
Impedance of V
REF
V
REF
Voltage1,
2
DIGITAL INPUTS
3
Logic High
Logic Low
Input Current
Input Capacitance
1
ANALOG OUTPUTS
Output Swing
Output Drive Current
Output Impedance
Output Short Circuit Current
--V
EE
+1.4
--5
R
O
I
SC
V
CC
--1.4
1
25
30
40
55
5
V
mA
W
mA
mA
mA
mA
V
IH
V
IL
I
L
C
L
2.4
0.8
±10
8
V
V
mA
pF
REF
V
REF
350
3.5
700
1.05k
6
350
1.05k
W
V
See Application Hints for Driving
the reference input
t
sd
CT
Q
PSRR
30
0.04
--70
5
50
50
ms
LSB
dB
ppm/%
ZS to FS (20 V Step)
5k, 50pF load
DC
CLK and Data to V
OUTi
DV
EE
&
DV
CC
=
±5%,
ppm of FS
Symbol
Min
25
°
C
Typ
Max
Tmin to Tmax
Min
Max
Units
Test Conditions/Comments
+FS to AGND
+FS to V
EE
--FS to AGND
--FS to V
CC
DIGITAL OUTPUTS
Output High Voltage
Output Low Voltage
POWER SUPPLIES
V
CC
Voltage
5
V
EE
Voltage
5
DV
DD
Voltage
Positive Supply Current
Negative Supply Current
Digital Supply Current
Power Dissipation
ANALOG GROUND CURRENT
Per Channel
1
DIGITAL TIMING
SPECIFICATIONS
1,4
Input Clock Pulse Width
Data Setup Time
Data Hold Time
CLK to SDO Propagation Delay
DAC Register Load Pulse Width
Preset Pulse Width
Clock Edge to Load Time
LD Falling Edge to SDO
Tri-state Enable
t
CH
, t
CL
t
DS
t
DH
t
PD
t
LD
t
PR
t
CKLD1
t
CKLD2
t
HZ1
60
15
15
40
45
65
140
0
50
ns
ns
ns
ns
ns
ns
ns
ns
I
AGND
±60
mA
See Application Notes
V
IL
= 0, V
IH
= 5.0, C
L
= 20 pF
V
CC
V
REF
+1.5 12
V
EE
--12.75
--12
DV
DD
4.5
5
I
CC
8
I
EE
15
I
DD
PD
ISS
320
12.75
--5
5.5
10
20
2
420
V
REF
+1.5 12.75
--12.75
--5
4.5
5.5
10
20
2
450
V
V
V
mA
mA
mA
mW
V
OH
V
OL
4.5
0.5
V
V
Bipolar zero
Bipolar zero
Bipolar zero
Bipolar zero
Note: t
LD
and t
CKLD2
cannot both
be min. since t
CKLD1
=t
CKLD2
+t
LD
Rev. 4.01
5
