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NDT014D84Z

Power Field-Effect Transistor, 2.7A I(D), 60V, 0.2ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET

器件类别:分立半导体    晶体管   

厂商名称:Fairchild

厂商官网:http://www.fairchildsemi.com/

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器件参数
参数名称
属性值
厂商名称
Fairchild
包装说明
SMALL OUTLINE, R-PDSO-G4
Reach Compliance Code
unknown
ECCN代码
EAR99
外壳连接
DRAIN
配置
SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压
60 V
最大漏极电流 (ID)
2.7 A
最大漏源导通电阻
0.2 Ω
FET 技术
METAL-OXIDE SEMICONDUCTOR
JESD-30 代码
R-PDSO-G4
元件数量
1
端子数量
4
工作模式
ENHANCEMENT MODE
最高工作温度
150 °C
封装主体材料
PLASTIC/EPOXY
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
极性/信道类型
N-CHANNEL
最大脉冲漏极电流 (IDM)
10 A
认证状态
Not Qualified
表面贴装
YES
端子形式
GULL WING
端子位置
DUAL
晶体管应用
SWITCHING
晶体管元件材料
SILICON
文档预览
September 1996
NDT014
N-Channel Enhancement Mode Field Effect Transistor
General Description
Power SOT N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly
suited for low voltage applications such as DC motor control
and DC/DC conversion where fast switching, low in-line power
loss, and resistance to transients are needed.
Features
2.7A, 60V. R
DS(ON)
= 0.2
@ V
GS
= 10V.
High density cell design for extremely low R
DS(ON)
.
High power and current handling capability in a widely used
surface mount package.
_________________________________________________________________________________________________________
D
D
G
D
S
G
S
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current
- Continuous
- Pulsed
Maximum Power Dissipation
T
A
= 25°C unless otherwise noted
NDT014
60
±20
(Note 1a)
Units
V
V
A
±2.7
±10
(Note 1a)
(Note 1b)
(Note 1c)
3
1.3
1.1
-65 to 150
W
T
J
,T
STG
Operating and Storage Temperature Range
°C
THERMAL CHARACTERISTICS
R
θ
JA
R
θ
JC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
42
12
°C/W
°C/W
* Order option J23Z for cropped center drain lead.
© 1997 Fairchild Semiconductor Corporation
NDT014 Rev. C1
Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
I
DSS
I
GSSF
I
GSSR
V
GS(th)
R
DS(ON)
g
FS
C
iss
C
oss
C
rss
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
V
GS
= 0 V, I
D
= 250 µA
V
DS
= 60 V, V
GS
= 0 V
V
DS
= 48 V, V
GS
= 0 V, T
J
=125°C
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
V
GS
= 20 V, V
DS
= 0 V
V
GS
= -20 V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 1.6 A
V
DS
= 25 V, I
D
= 1.6 A
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
2
3
0.18
2
60
25
250
100
-100
V
µA
µA
nA
nA
ON CHARACTERISTICS
(Note 2)
Gate Threshold Voltage
Static Drain-Source On-Resistance
Forward Transconductance
4
0.2
V
S
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
155
60
15
pF
pF
pF
SWITCHING CHARACTERISTICS
(Note 2)
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DS
= 48 V,
I
D
= 10 A, V
GS
= 10 V
V
DD
=30 V, I
D
= 10 A,
V
GEN
= 10 V, R
GEN
= 24
10
64
10
10
5
1.2
2
20
100
20
20
11
3.1
5.8
ns
ns
ns
ns
nC
nC
nC
NDT014 Rev. C1
Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
I
SM
V
SD
t
rr
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
Maximum Continuous Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
Reverse Recovery Time
V
GS
= 0 V, I
S
= 2.7A
(Note 2)
2.7
22
0.95
1.6
140
A
A
V
ns
V
GS
= 0 V, I
F
= 10 A, dI
F
/dt = 100 A/µs
P
D
(
t
) =
R
θ
J A
t
)
(
T
J
T
A
=
R
θ
J C
R
θ
CA
t
)
+
(
T
J
T
A
=
I
2
(
t
) ×
R
DS
(
ON
)
D
T
J
Typical R
θ
JA
using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 42
o
C/W when mounted on a 1 in
2
pad of 2oz copper.
b. 95
o
C/W when mounted on a 0.066 in
2
pad of 2oz copper.
c. 110
o
C/W when mounted on a 0.0123 in
2
pad of 2oz copper.
1a
1b
1c
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDT014 Rev. C1
Typical Electrical Characteristics
8
2.5
V
I
D
, DRAIN-SOURCE CURRENT (A)
GS
= 10V
8.0
7.0
DRAIN-SOURCE ON-RESISTANCE
2
V
GS
= 5.5V
6.0
6.5
7.0
8.0
10
6
6.5
4
R
DS(on)
, NORMALIZED
6.0
5.5
1.5
2
1
5.0
4.5
0
0
1
V
DS
2
3
, DRAIN-SOURCE VOLTAGE (V)
4
0.5
0
2
4
6
I
D
, DRAIN CURRENT (A)
8
10
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Gate Voltage
and Drain Current.
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
-50
3
DRAIN-SOURCE ON-RESISTANCE
V
G S
= 10V
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I
D
= 2.7A
2.5
2
1.5
1
0.5
0
V
GS
= 10 V
TJ = 125°C
R
DS(ON)
, NORMALIZED
25°C
-55°C
-25
0
25
50
75
100
T , JUNCTION TEMPERATURE (°C)
J
125
150
0
2
I
D
4
6
, DRAIN-CURRENT(A)
8
10
Figure 3. On-Resistance Variation
with Temperature.
Figure 4. On-Resistance Variation with Drain
Current and Temperature.
10
GATE-SOURCE THRESHOLD VOLTAGE
1.2
V
DS
= 10V
8
I
D
, DRAIN CURRENT (A)
TJ = -55°C
25°C
125°C
1.1
V
DS
= V
GS
I
D
= 250µA
V
th
, NORMALIZED
6
1
4
0.9
2
0.8
0
2
4
V
GS
6
8
, GATE TO SOURCE VOLTAGE (V)
10
0.7
-50
-25
0
25
50
75
100
T
J
, JUNCTION TEMPERATURE (°C)
125
150
Figure 5. Transfer Characteristics.
Figure 6. Gate Threshold Variation with
Temperature.
NDT014 Rev. C1
Typical Electrical Characteristics
(continued)
1.15
DRAIN-SOURCE BREAKDOWN VOLTAGE
10
I
D
= 250µA
1.1
I
S
, REVERSE DRAIN CURRENT (A)
5
V
GS
= 0 V
, NORMALIZED
1
0.5
1.05
T J = 125°C
25°C
0.1
DSS
1
-55°C
BV
0.95
0.01
0.9
-50
-25
0
25
50
75
100
T
J
, JUNCTION TEMPERATURE (°C)
125
150
0.001
0.2
0.4
V
SD
0.6
0.8
1
1.2
1.4
, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Breakdown Voltage Variation with
Temperature.
Figure 8. Body Diode Forward Voltage Variation with
Current and Temperature.
400
300
15
I
D
= 2.7A
C iss
, GATE-SOURCE VOLTAGE (V)
12
V
DS
= 10V
20V
200
CAPACITANCE (pF)
40V
100
9
C oss
50
30
20
6
f = 1 MHz
V
GS
= 0 V
C rss
3
10
0.1
V
0
50
0
0.2
0.5
1
2
5
10
20
GS
1
2
3
4
5
6
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
Figure 9. Capacitance Characteristics.
Figure 10. Gate Charge Characteristics.
V
DD
t
d(on)
t
on
t
off
t
r
90%
t
d(off)
90%
V
IN
D
R
L
V
OUT
V
OUT
10%
t
f
V
GS
R
GEN
10%
INVERTED
G
DUT
90%
S
V
IN
10%
50%
50%
PULSE WIDTH
Figure 11. Switching Test Circuit.
Figure 12. Switching Waveforms.
NDT014 Rev. C1
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参数对比
与NDT014D84Z相近的元器件有:NDT014J23ZD84Z。描述及对比如下:
型号 NDT014D84Z NDT014J23ZD84Z
描述 Power Field-Effect Transistor, 2.7A I(D), 60V, 0.2ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET Power Field-Effect Transistor, 2.7A I(D), 60V, 0.2ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET
厂商名称 Fairchild Fairchild
包装说明 SMALL OUTLINE, R-PDSO-G4 SMALL OUTLINE, R-PDSO-G3
Reach Compliance Code unknown unknown
ECCN代码 EAR99 EAR99
外壳连接 DRAIN DRAIN
配置 SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压 60 V 60 V
最大漏极电流 (ID) 2.7 A 2.7 A
最大漏源导通电阻 0.2 Ω 0.2 Ω
FET 技术 METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JESD-30 代码 R-PDSO-G4 R-PDSO-G3
元件数量 1 1
端子数量 4 3
工作模式 ENHANCEMENT MODE ENHANCEMENT MODE
最高工作温度 150 °C 150 °C
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY
封装形状 RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE SMALL OUTLINE
极性/信道类型 N-CHANNEL N-CHANNEL
最大脉冲漏极电流 (IDM) 10 A 10 A
认证状态 Not Qualified Not Qualified
表面贴装 YES YES
端子形式 GULL WING GULL WING
端子位置 DUAL DUAL
晶体管应用 SWITCHING SWITCHING
晶体管元件材料 SILICON SILICON
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