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P2781AF-08ST

78 MHz, OTHER CLOCK GENERATOR, PDSO8
78 MHz, 其他时钟发生器, PDSO8

器件类别:嵌入式处理器和控制器    微控制器和处理器   

厂商名称:ON Semiconductor(安森美)

厂商官网:http://www.onsemi.cn

器件标准:

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器件参数
参数名称
属性值
Brand Name
ON Semiconduc
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
ON Semiconductor(安森美)
零件包装代码
SOIC
包装说明
SOP, SOP8,.25
针数
8
制造商包装代码
751-07
Reach Compliance Code
compli
ECCN代码
EAR99
JESD-30 代码
R-PDSO-G8
JESD-609代码
e3
长度
4.9 mm
端子数量
8
最高工作温度
70 °C
最低工作温度
最大输出时钟频率
78 MHz
封装主体材料
PLASTIC/EPOXY
封装代码
SOP
封装等效代码
SOP8,.25
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
3.3 V
主时钟/晶体标称频率
78 MHz
认证状态
Not Qualified
座面最大高度
1.75 mm
最大压摆率
21.2 mA
最大供电电压
3.6 V
最小供电电压
3 V
标称供电电压
3.3 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子面层
TIN
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
3.91 mm
uPs/uCs/外围集成电路类型
CLOCK GENERATOR, OTHER
文档预览
P2781/82/84
General Purpose EMI
Reduction IC
Features
Provides up to 15dB of EMI suppression
FCC approved method of EMI attenuation
Generates a 1X, 2X, and 4X low EMI spread spectrum
clock of the input frequency
Input frequency range from 3 to 78MHz
External loop filter for spread % adjustment
Spreading ranges from ±0.25% to ±5.0%
Ultra low cycle-to-cycle jitter
Zero-cycle slip
3.3V operating voltage range
Ultra-low power CMOS design
P278xA is available in an 8 pin SOIC Package
source, which provides system wide reduction of EMI of all
clock dependent signals. The P278xA allows significant
system cost savings by reducing the number of circuit
board layers and shielding that are traditionally required to
pass EMI regulations.
The P278xA uses the most efficient and optimized
modulation profile approved by the FCC. The P278xA
modulates the output of a single PLL in order to “spread”
the bandwidth of a synthesized clock and, more
importantly, decreases the peak amplitudes of its
harmonics. This result in significantly lower system EMI
compared to the typical narrow band signal produced by
oscillators and most frequency generators. Lowering EMI
by increasing a signal’s bandwidth is called spread
spectrum clock generation.
Product Description
The P278xA is a versatile spread spectrum frequency
modulator designed specifically for digital camera and other
digital video and imaging applications. The P278xA
reduces electromagnetic interference (EMI) at the clock
Applications
The P278xA is targeted towards MFP, xDSL, fax modem,
set-top box, USB controller, DSC, and embedded systems.
Block Diagram
FS0
FS1
LF
VDD
PLL
Modulation
XIN / CLKIN
XOUT
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
Phase
Detector
VCO
Output
Divider
ModOUT
VSS
©2010 SCILLC. All rights reserved.
NOVEMBER 2010 – Rev. 2.1
Publication Order Number:
P2781/82/84
P2781/82/84
Pin Configuration
XIN / CLKIN
XOUT
FS1
LF
1
2
3
4
8
VDD
7
FS0
P278xA
6
ModOUT
5
VSS
Standard pin Configuration offered in both
8 pin SOIC Packages.
Pin Description (P278xA)
Pin#
1
2
3
4
5
6
7
8
Pin Name
XIN/CLKIN
XOUT
FS1
LF
VSS
ModOUT
FS0
VDD
Type
I
O
I
I
I
O
I
P
Description
Connect to crystal or clock input. This pin has dual functions. It can be connected
either to an external crystal or an external reference clock.
Crystal connection. If using an external reference, this pin must be left
unconnected.
Digital logic input used to select input frequency range (see the
Input Frequency
Selection Table).
This pin has an internal pull-up resistor.
External Loop Filter for the PLL. By changing the value of the CRC circuit, the
percentage spread can be adjusted accordingly. See the
Loop Filter Selection
Table
for detail value.
Ground Connection. Connect to system ground.
Spread Spectrum Clock Output.
Digital logic input used to select input frequency range (see the
Input Frequency
Selection Table).
This pin has an internal pull-up resistor.
Connect to +3.3 V
Input Frequency Selection Table
FS1
0
0
1
1
FS0
0
1
0
1
Input (MHz)
3 to 9
10 to 19
20 to 38
39 to 78
Output Frequency Scaling (MHz)
P2781A
3 to 9
10 to 19
20 to 38
39 to 78
P2782A
6 to 18
20 to 38
40 to 76
78 to 156
P2784A
12 to 36
40 to 76
80 to 152
156 to 312
Modulation Rate (KHz)
Fin / 128
Fin / 256
Fin / 512
Fin / 1024
Rev. 2 | Page 2 of 8 | www.onsemi.com
P2781/82/84
Loop Filter Selection Table VDD 3.3V
Contact ON Semiconductor for loop values that are not listed in the table and for
Component selection values for industrial and automotive temperatures.
Input
MHz
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21-22
23-24
25-26
27-28
29-30
31-32
33-34
35-36
37-38
39-42
43-46
47-50
51-54
55-58
59-62
63-66
67-70
71-74
75-78
BW = ±0.50%
1
FS1 FS0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
C1
(pF)
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
C2
(pF)
330,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
R1
(ohm)
220
270
390
510
620
820
1,000
330
390
510
560
620
750
820
910
1,000
1,200
330
390
510
560
620
750
820
910
1,000
1,200
330
390
510
560
620
750
820
910
1,000
1,200
BW = ±0.75%
1
C1
(pF)
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
C2
(pF)
330,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
R1
(ohm)
300
390
560
750
1,000
1,200
1,500
510
560
750
820
1,000
1,100
1,200
1,300
1,500
1,600
560
620
750
820
1,000
1,100
1,200
1,300
1,500
1,600
560
620
750
820
1,000
1,100
1,200
1,300
1,600
1,800
C1
(pF)
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
BW = ±1.00%
1
C2
(pF)
R1
(ohm)
C1
(pF)
560
560
560
680
330
680
270
560
560
680
470
330
330
680
390
270
270
560
560
680
470
330
330
680
390
270
270
560
560
680
470
330
330
680
390
270
270
BW = ±1.25%
1
C2
(pF)
100,000
100,000
100,000
6,800
3,300
6,800
2,700
100,000
100,000
6,800
4,700
3,300
3,300
6,800
3,900
2,700
2,700
100,000
100,000
6,800
4,700
3,300
3,300
6,800
3,900
2,700
2,700
100,000
100,000
6,800
4,700
3,300
3,300
6,800
3,900
2,700
2,700
R1
(ohm)
510
680
910
1,200
1,200
2,200
2,200
910
1,100
1,200
1,200
1,200
1,500
2,200
2,200
2,200
2,700
910
1,100
1,200
1,200
1,200
1,500
2,200
2,200
2,200
2,700
910
1,100
1,200
1,200
1,200
1,500
2,200
2,200
2,200
2,700
Note: 1. The BW value is representative of typical conditions.
100,000
390
100,000
560
100,000
750
10,000
1,000
5,600
1,200
12,000
2,200
5,600
2,200
100,000
750
100,000 866(1%)
10,000
1,000
12,000
1,200
5,600
1,200
3,900
1,200
12,000
2,200
10,000
2,200
5,600
2,200
3,300
2,200
100,000
750
100,000 866 (1%)
10,000
1,000
12,000
1,200
6,800
1,200
3,900
1,200
12,000
2,200
10,000
2,200
5,600
2,200
3,300
2,200
100,000
750
100,000 866 (1%)
10,000
1,000
12,000
1,200
6,800
1,200
3,900
1,200
12,000
2,200
8,200
2,200
5,600
2,200
3,300
2,200
Rev. 2 | Page 3 of 8 | www.onsemi.com
P2781/82/84
The P278xA performs Zero Cycle Slip when set at low percentage spreading. This allows no occurrence of system timing
error. The optimal setting should minimize system EMI to the fullest without affecting system performance. The spreading is
described as a percentage deviation of the center frequency.
(Note: the center frequency is the frequency of the external reference input on CLKIN, Pin 1.)
Spread Spectrum Selection
The P2781A is designed for PC peripheral, networking, notebook PC, and LCD monitor applications. It is optimized for
operation between 3 to 78MHz range. In the following application schematic example, the P2781A spread percentage
selection is determined by the external LF value specified in the Loop Filter Selection Table. The
Input Frequency Selection
Table
specifies the input frequency range. The external LF allows the user to fine tune the spread percentage to optimize the
EMI reduction benefits of the spread spectrum.
+3.3V
16 MHz
1
XIN/CLKIN VDD
8
2
XOUT
3
FS1
FS0
7
ModOUT
6
2.2 K
0.1µF
Modulated 16MHz Clock
To target Chip
C2
R1
C1
4
LF
0 Ohm
VSS
5
P278xA
Note: Both logic input pins FS1 and FS0 have to be connected to either VDD or VSS. Do not leave them floating.
Rev. 2 | Page 4 of 8 | www.onsemi.com
P2781/82/84
Absolute Maximum Ratings
Symbol
V
DD
, V
IN
T
STG
T
s
T
J
T
DV
Storage temperature
Max. Soldering Temperature (10 sec)
Junction Temperature
Static Discharge Voltage (As per JEDEC STD22- A114-B)
Parameter
Rating
-0.5 to +4.6
-65 to +125
260
150
2
Unit
V
°
C
°
C
°
C
KV
Voltage on any pin with respect to Ground
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
Operating Conditions
Parameter
VDD
T
A
C
L
C
IN
Supply Voltage
Operating Temperature (Ambient Temperature)
Load Capacitance
Input Capacitance
Description
Min
3.0
-40
Max
3.6
+85
15
7
Unit
V
°
C
pF
pF
DC Electrical Characteristics
Symbol
V
IL
V
IH
I
IL
I
IH
I
XOL
I
XOH
V
OL
V
OH
I
DD
I
CC
VDD
Input low voltage
(Test condition: All parameters are measured at room temperature (+25° unless otherwise stated.)
C)
Parameter
Input high voltage
Input low current
(internal input pull-up resistor on FS0 and FS1)
Input high current
(internal input pull-up resistor on FS0 and FS1)
XOUT output low current
XOUT output high current
Output low voltage (VDD = 3.3V, I
OL
= 20mA)
Output high voltage (VDD = 3.3V, I
OH
= 20mA)
Static supply current
Typical dynamic supply current
(25pF scope probe loading)
Operating voltage
Min
VSS – 0.3
2.0
Typ
Max
0.8
VDD +0.3
Unit
V
V
µA
µA
mA
mA
60
60
10
10
0.4
2.5
3
5.2 at 3MHz
3.0
3.3
21.2 at 82MHz
3.6
V
V
mA
mA
V
Rev. 2 | Page 5 of 8 | www.onsemi.com
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参数对比
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