PIC24F16KA102 Family
Data Sheet
20/28-Pin General Purpose,
16-Bit Flash Microcontrollers
with nanoWatt XLP™ Technology
©
2009 Microchip Technology Inc.
Preliminary
DS39927B
Note the following details of the code protection feature on Microchip devices:
•
•
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
•
•
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, K
EE
L
OQ
, K
EE
L
OQ
logo, MPLAB, PIC, PICmicro,
PICSTART, rfPIC, SmartShunt and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
FilterLab, Linear Active Thermistor, MXDEV, MXLAB,
SEEVAL, SmartSensor and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, nanoWatt XLP,
PICkit, PICDEM, PICDEM.net, PICtail, PIC
32
logo, PowerCal,
PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select
Mode, Total Endurance, TSHARC, WiperLock and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2009, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC
®
MCUs and dsPIC
®
DSCs, K
EE
L
OQ
®
code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS39927B-page ii
Preliminary
©
2009 Microchip Technology Inc.
PIC24F16KA102 FAMILY
20/28-Pin General Purpose, 16-Bit Flash Microcontrollers
with nanoWatt XLP™ Technology
Power Management Modes:
Run – CPU, Flash, SRAM and Peripherals On
Doze – CPU Clock Runs Slower than Peripherals
Idle – CPU Off, Flash, SRAM and Peripherals On
Sleep – CPU, Flash and Peripherals Off and SRAM
On
• Deep Sleep – CPU, Flash, SRAM and
Most Peripherals Off
- Run mode currents down to 8
μA
typical
- Idle mode currents down to 2
μA
typical
- Deep Sleep mode currents down to 20 nA typical
- RTCC 490 nA, 32 kHz, 1.8V
- Watchdog Timer 350 nA, 1.8V typical
•
•
•
•
Analog Features:
• 10-Bit, up to 9-Channel Analog-to-Digital Converter:
- 500 ksps conversion rate
- Conversion available during Sleep and Idle
• Dual Analog Comparators with Programmable Input/
Output Configuration
• Charge Time Measurement Unit (CTMU):
- Used for capacitance sensing
- Time measurement, down to 1 ns resolution
- Delay/pulse generation, down to 1 ns resolution
Special Microcontroller Features:
• Operating Voltage Range of 1.8V to 3.6V
• High-Current Sink/Source (18 mA/18 mA) on All I/O Pins
• Flash Program Memory:
- Erase/write cycles: 10,000 minimum
- 40-years’ data retention minimum
• Data EEPROM:
- Erase/write cycles: 100,000 minimum
- 40-years’ data retention minimum
• Fail-Safe Clock Monitor
• System Frequency Range Declaration bits:
- Declaring the frequency range optimizes the current
consumption.
• Flexible Watchdog Timer (WDT) with On-Chip,
Low-Power RC Oscillator for Reliable Operation
• In-Circuit Serial Programming™ (ICSP™) and
In-Circuit Debug (ICD) via two Pins
• Programmable High/Low-Voltage Detect (HLVD)
• Brown-out Reset (BOR):
- Standard BOR with three programmable trip points;
can be disabled in Sleep
• Extreme Low-Power DSBOR for Deep Sleep,
LPBOR for all other modes
High-Performance CPU:
• Modified Harvard Architecture
• Up to 16 MIPS Operation @ 32 MHz
• 8 MHz Internal Oscillator with 4x PLL Option and
Multiple Divide Options
• 17-Bit by 17-Bit Single-Cycle Hardware Multiplier
• 32-Bit by 16-Bit Hardware Divider
• 16-Bit x 16-Bit Working Register Array
• C Compiler Optimized Instruction Set Architecture
Peripheral Features:
• Hardware Real-Time Clock and Calendar (RTCC):
- Provides clock, calendar and alarm functions
- Can run in Deep Sleep Mode
• Programmable Cyclic Redundancy Check (CRC)
• Serial Communication modules:
- SPI, I
2
C™ and two UART modules
• Three 16-Bit Timers/Counters with Programmable
Prescaler
• 16-Bit Capture Inputs
• 16-Bit Compare/PWM Output
• Configurable Open-Drain Outputs on Digital I/O Pins
• Up to Three External Interrupt Sources
Data
EEPROM
(bytes)
Program
Memory
(bytes)
Capture
Input
SRAM
(bytes)
Timers
16-Bit
Comparators
CTMU (ch)
9
9
9
9
10-Bit A/D
(ch)
Output
Compare/
PWM
UART/
IrDA
®
08KA101
16KA101
08KA102
16KA102
20
20
28
28
8K
16K
8K
16K
1.5K
1.5K
1.5K
1.5K
512
512
512
512
3
3
3
3
1
1
1
1
1
1
1
1
2
2
2
2
SPI
PIC24F
Device
1
1
1
1
1
1
1
1
9
9
9
9
2
2
2
2
©
2009 Microchip Technology Inc.
Preliminary
DS39927B-page 1
RTCC
Y
Y
Y
Y
I
2
C™
Pins
PIC24F16KA102 FAMILY
Pin Diagrams
20-Pin PDIP, SSOP, SOIC
(2)
MCLR
/
V
PP
/RA5
PGC2/AN0/V
REF
+/CN2/RA0
PGD2/AN1/V
REF
-/CN3/RA1
PGD1/AN2/C1IND/C2INB/U2TX/CN4/RB0
PGC1/AN3/C1INC/C2INA/U2RX/U2BCLK/CN5/RB1
U1RX/U1BCLK/CN6/RB2
OSCI/CLKI/AN4/C1INB/C2IND/CN30/RA2
OSCO/CLKO/AN5/C1INA/C2INC/CN29/RA3
PGD3/SOSCI/U2RTS/CN1/RB4
PGC3/SOSCO/T1CK/U2CTS/CN0/RA4
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
DD
V
SS
REFO/SS1/T2CK/T3CK/CN11/RB15
AN10/CV
REF
/RTCC/SDI1/OCFA/C1OUT/INT1/CN12/RB14
AN11/SDO1/CTPLS/CN13/RB13
AN12/HLVDIN/SCK1/CTED2/CN14/RB12
OC1/IC1/C2OUT/INT2/CTED1/CN8/RA6
U1RTS/SDA1/CN21/RB9
U1CTS/SCL1/CN22/RB8
U1TX/INT0/CN23/RB7
28-Pin SPDIP, SSOP, SOIC
(2)
MCLR/V
PP
/RA5
AN0/V
REF
+/CN2/RA0
AN1/V
REF
-/CN3/RA1
PGD1/AN2/C1IND/C2INB/U2TX/CN4/RB0
PGC1/AN3/C1INC/C2INA/U2RX/U2BCLK/CN5/RB1
AN4/C1INB/C2IND/U1RX/U1BCLK/CN6/RB2
AN5/C1INA/C2INC/CN7/RB3
V
SS
OSCI/CLKI/CN30/RA2
OSCO/CLKO/CN29/RA3
SOSCI/U2RTS/CN1/RB4
SOSCO/T1CK/U2CTS/CN0/RA4
V
DD
PGD3/SDA1
(1)
/CN27/RB5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
DD
V
SS
REFO/SS1/T2CK/T3CK/CN11/RB15
AN10/CV
REF
/RTCC/OCFA/C1OUT/INT1/CN12/RB14
AN11/SDO1/CTPLS/CN13/RB13
AN12/HLVDIN/CTED2/CN14/RB12
PGC2/SCK1/CN15/RB11
PGD2/SDI1/PMD2/CN16/RB10
OC1/C2OUT/INT2/CTED1/CN8/RA6
IC1/CN9/RA7
U1RTS/SDA1/CN21/RB9
U1CTS/SCL1/CN22/RB8
U1TX/INT0/CN23/RB7
PGC3/SCL1
(1)
/CN24/RB6
PIC24XXKAX01
Note 1:
2:
Alternative multiplexing for SDA1 and SCL1 when the I2CSEL Configuration bit is set.
All device pins have a maximum voltage of 3.6V and are not 5V tolerant.
DS39927B-page 2
Preliminary
PIC24FXXKAX02
©
2009 Microchip Technology Inc.
PIC24F16KA102 FAMILY
Pin Diagrams (Continued)
20-Pin QFN
(1,2)
PGD1/AN2/C1IND/C2INB/U2TX/CN4/RB0
PGC1/AN3/C1INC/C2INA/U2RX/U2BCLK/CN5/RB1
U1RX/U1BCLK/CN6/RB2
OSCI/CLKI/AN4/C1INB/C2IND/CN30/RA2
OSCO/CLKO/AN5/C1INA/C2INC/CN29/RA3
20 19 18 17 16
15
1
14
2
3
PIC24FXXKA102
13
12
4
11
5
6 7 8 9 10
PGD3/SOSCI/U2RTS/CN1/RB4
PGC3/SOSCO/T1CK/U2CTS/CN0/RA4
U1TX/INT0/CN23/RB7
U1CTS/SCL1/CN22/RB8
U1RTS/SDA1/CN21/RB9
PGD2/AN1/V
REF
-/CN3/RA1
PGC2/AN0/V
REF
+/CN2/RA0
MCLR/V
PP
/RA5
V
DD
V
SS
REFO/SS1/T2CK/T3CK/CN11/RB15
AN10/CV
REF
/RTCC/SDI1/OCFA/C1OUT/INT1/CN12/RB14
AN11/SDO1/CTPLS/ CN13/RB13
AN12/HLVDIN/SCK1/CTED2/CN14/RB12
OC1/IC1/C2OUT/INT2/CTED1/CN8/RA6
Note 1:
2:
The bottom pad of the QFN package should be connected to Vss.
All device pins have a maximum voltage of 3.6V and are not 5V tolerant.
©
2009 Microchip Technology Inc.
Preliminary
DS39927B-page 3
