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SI2304DS
N-channel enhancement mode field-effect transistor
Rev. 01 — 17 August 2001
M3D088
Product data
1. Description
N-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOS™
1
technology
Product availability:
SI2304DS in SOT23.
2. Features
s
TrenchMOS™ technology
s
Very fast switching
s
Subminiature surface mount package.
3. Applications
s
Battery management
s
High speed switch
s
Low power DC to DC converter.
4. Pinning information
Table 1:
Pin
1
2
3
Pinning - SOT23, simplified outline and symbol
Description
gate (g)
source (s)
drain (d)
g
1
Top view
2
MSB003
MBB076
Simplified outline
3
Symbol
d
s
SOT23
1.
TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.
Philips Semiconductors
SI2304DS
N-channel enhancement mode field-effect transistor
5. Quick reference data
Table 2:
V
DS
I
D
P
tot
T
j
R
DSon
Quick reference data
Conditions
T
j
= 25 to 150
°C
T
sp
= 25
°C;
V
GS
= 5 V
T
sp
= 25
°C
V
GS
= 10 V; I
D
= 500 mA
V
GS
= 4.5 V; I
D
= 500 mA
Min
−
−
−
−
−
−
Typ
−
−
−
−
−
−
Max
30
1.7
0.83
150
117
190
Unit
V
A
W
°C
mΩ
mΩ
drain-source voltage (DC)
drain current (DC)
total power dissipation
junction temperature
drain-source on-state resistance
Symbol Parameter
6. Limiting values
Table 3:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
I
S
I
SM
drain-source voltage (DC)
drain-gate voltage (DC)
gate-source voltage (DC)
drain current (DC)
peak drain current
total power dissipation
storage temperature
operating junction temperature
source (diode forward) current (DC) T
sp
= 25
°C
peak source (diode forward) current T
sp
= 25
°C;
pulsed; t
p
≤
10
µs
T
sp
= 25
°C;
V
GS
= 5 V;
Figure 2
and
3
T
sp
= 100
°C;
V
GS
= 5 V;
Figure 2
and
3
T
sp
= 25
°C;
pulsed; t
p
≤
10
µs
T
sp
= 25
°C;
Figure 1
Conditions
T
j
= 25 to 150
°C
T
j
= 25 to 150
°C;
R
GS
= 20 kΩ
Min
−
−
−
−
−
−
−
−65
−65
−
−
Max
30
30
±20
1.7
1.1
7.5
0.83
+150
+150
0.83
3.3
Unit
V
V
V
A
A
A
W
°C
°C
A
A
Source-drain diode
9397 750 08526
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 17 August 2001
2 of 12
Philips Semiconductors
SI2304DS
N-channel enhancement mode field-effect transistor
03aa17
03aa25
120
Pder
(%)
100
120
Ider
(%)
100
80
80
60
60
40
40
20
20
0
0
50
100
150
Tsp ( C)
o
0
200
0
50
100
150
Tsp ( C)
o
200
P
tot
P
der
=
----------------------
×
100%
-
P
°
tot
(
25 C
)
V
GS
≥
10 V
I
D
I
der
=
-------------------
×
100%
I
°
D
(
25 C
)
Fig 1. Normalized total power dissipation as a
function of solder point temperature.
102
ID
(A)
10
RDSon = VDS / ID
Fig 2. Normalized continuous drain current as a
function of solder point temperature.
003aaa120
1
P
tp = 10
µs
1 ms
tp
T
δ
=
D.C.
10 ms
100 ms
10-1
tp
T
t
10-2
10-1
1
10
VDS (V)
102
T
sp
= 25°C; I
DM
is single pulse
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 08526
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 17 August 2001
3 of 12
Philips Semiconductors
SI2304DS
N-channel enhancement mode field-effect transistor
7. Thermal characteristics
Table 4:
R
th(j-sp)
Thermal characteristics
Conditions
mounted on a metal clad substrate;
Figure 4
Value Unit
100
K/W
thermal resistance from junction to solder point
Symbol Parameter
7.1 Transient thermal impedance
103
Zth(j-sp)
(K/W)
102
δ
=
0.02
0.05
0.1
10
0.2
0.5
Single pulse
tp
T
t
P
003aaa121
δ
=
tp
T
1
10-4
10-3
10-2
10-1
1
tp (s)
10
Fig 4. Transient thermal impedance from junction to solder point as a function of
pulse duration.
9397 750 08526
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 17 August 2001
4 of 12
