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TC74AC02F

CMOS Digital Integrated Circuit Silicon Monolithic Quad 2-Input NOR Gate

器件类别:逻辑    逻辑   

厂商名称:Toshiba(东芝)

厂商官网:http://toshiba-semicon-storage.com/

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
Toshiba(东芝)
零件包装代码
SOIC
包装说明
SOP, SOP14,.3
针数
14
Reach Compliance Code
unknow
系列
AC
JESD-30 代码
R-PDSO-G14
长度
10.3 mm
负载电容(CL)
50 pF
逻辑集成电路类型
NOR GATE
最大I(ol)
0.012 A
功能数量
4
输入次数
2
端子数量
14
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
PLASTIC/EPOXY
封装代码
SOP
封装等效代码
SOP14,.3
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
3.3/5 V
Prop。Delay @ Nom-Su
11.2 ns
传播延迟(tpd)
11.2 ns
认证状态
Not Qualified
施密特触发器
NO
座面最大高度
1.9 mm
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
2 V
标称供电电压 (Vsup)
3.3 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
5.3 mm
文档预览
TC74AC02P/F/FN/FT
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74AC02P,TC74AC02F,TC74AC02FN,TC74AC02FT
Quad 2-Input NOR Gate
The TC74AC02 is an advanced high speed CMOS 2-INPUT
NOR GATE fabricated with silicon gate and double-layer metal
wiring C
2
MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
The internal circuit is composed of 3 stages including buffer
output, which provide high noise immunity and stable output.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74AC02P
Features
High speed: t
pd
= 3.7 ns (typ.) at V
CC
= 5 V
Low power dissipation: I
CC
= 4
μA
(max) at Ta = 25°C
High noise immunity: V
NIH
= V
NIL
= 28% V
CC
(min)
Symmetrical output impedance: |I
OH
| = I
OL
= 24 mA (min)
Capability of driving 50
Ω
transmission lines.
Balanced propagation delays: t
pLH
t
pHL
Wide operating voltage range: V
CC (opr)
= 2 to 5.5 V
Pin and function compatible with 74F02
TC74AC02F
TC74AC02FN
TC74AC02FT
Weight
DIP14-P-300-2.54
SOP14-P-300-1.27A
SOL14-P-150-1.27
TSSOP14-P-0044-0.65A
: 0.96 g (typ.)
: 0.18 g (typ.)
: 0.12 g (typ.)
: 0.06 g (typ.)
1
2007-10-01
TC74AC02P/F/FN/FT
Pin Assignment
IEC Logic Symbol
1A
1B
2A
2B
3A
3B
4A
4B
(2)
(3)
(5)
(6)
(8)
(9)
(11)
(12)
>
1
1Y
1A
1B
2Y
2A
2B
GND
1
2
3
4
5
6
7
(top view)
14
13
12
11
10
9
8
V
CC
4Y
4B
4A
3Y
3B
3A
(1)
(4)
(10)
(13)
1Y
2Y
3Y
4Y
Truth Table
A
L
L
H
H
B
L
H
L
H
Y
H
L
L
L
Absolute Maximum Ratings (Note 1)
Characteristics
Supply voltage range
DC input voltage
DC output voltage
Input diode current
Output diode current
DC output current
DC V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
Rating
−0.5
to 7.0
−0.5
to V
CC
+
0.5
−0.5
to V
CC
+
0.5
±20
±50
±50
±100
500 (DIP) (Note 2)/180 (SOP/TSSOP)
−65
to 150
Unit
V
V
V
mA
mA
mA
mA
mW
°C
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta
= −40
to 65°C. From Ta
=
65 to 85°C a derating factor of
−10
mW/°C should be
applied up to 300 mW.
2
2007-10-01
TC74AC02P/F/FN/FT
Operating Ranges (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Operating temperature
Input rise and fall time
Symbol
V
CC
V
IN
V
OUT
T
opr
dt/dV
Rating
2.0 to 5.5
0 to V
CC
0 to V
CC
−40
to 85
0 to 100 (V
CC
=
3.3
±
0.3 V)
0 to 20 (V
CC
=
5
±
0.5 V)
Unit
V
V
V
°C
ns/V
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
Electrical Characteristics
DC Characteristics
Test Condition
Characteristics
Symbol
V
CC
(V)
2.0
High-level input
voltage
V
IH
3.0
5.5
2.0
Low-level input
voltage
V
IL
3.0
5.5
2.0
I
OH
= −50
μA
High-level output
voltage
V
OH
V
IN
=
V
IL
I
OH
= −4
mA
I
OH
= −24
mA
I
OH
= −75
mA
(Note)
3.0
4.5
3.0
4.5
5.5
2.0
I
OL
= 50
μA
Low-level output
voltage
V
OL
V
IN
=
V
IH
or
I
OL
=
12 mA
V
IL
I
OL
=
24 mA
I
OL
=
75 mA
Input leakage
current
Quiescent supply
current
I
IN
I
CC
V
IN
=
V
CC
or GND
V
IN
= V
CC
or GND
(Note)
3.0
4.5
3.0
4.5
5.5
5.5
5.5
Min
1.50
2.10
3.85
1.9
2.9
4.4
2.58
3.94
Ta
=
25°C
Typ.
2.0
3.0
4.5
0.0
0.0
0.0
Max
0.50
0.90
1.65
0.1
0.1
0.1
0.36
0.36
±0.1
4.0
Ta
=
−40
to 85°C
Min
1.50
2.10
3.85
1.9
2.9
4.4
2.48
3.80
3.85
Max
0.50
0.90
1.65
0.1
0.1
0.1
0.44
0.44
1.65
±1.0
40.0
μA
μA
V
V
V
V
Unit
Note:
This spec indicates the capability of driving 50
Ω
transmission lines.
One output should be tested at a time for a 10 ms maximum duration.
3
2007-10-01
TC74AC02P/F/FN/FT
AC Characteristics
(C
L
=
50 pF, R
L
=
500
Ω,
input: t
r
=
t
f
=
3 ns)
Characteristics
Symbol
t
pLH
t
pHL
C
IN
C
PD
Test Condition
V
CC
(V)
Propagation delay
time
Input capacitance
Power dissipation
capacitance
(Note)
3.3
±
0.3
5.0
±
0.5
Min
Ta = 25°C
Typ.
6.1
4.8
5
82
Max
9.8
7.0
10
Ta
=
−40
to 85°C
Min
1.0
1.0
Max
11.2
8.0
10
ns
pF
pF
Unit
Note:
C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
I
CC (opr)
=
C
PD
·V
CC
·f
IN
+
I
CC
/4 (per gate)
4
2007-10-01
TC74AC02P/F/FN/FT
Package Dimensions
Weight: 0.96 g (typ.)
5
2007-10-01
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参数对比
与TC74AC02F相近的元器件有:TC74AC02P、TC74AC02P_07、TC74AC02FT。描述及对比如下:
型号 TC74AC02F TC74AC02P TC74AC02P_07 TC74AC02FT
描述 CMOS Digital Integrated Circuit Silicon Monolithic Quad 2-Input NOR Gate CMOS Digital Integrated Circuit Silicon Monolithic Quad 2-Input NOR Gate CMOS Digital Integrated Circuit Silicon Monolithic Quad 2-Input NOR Gate CMOS Digital Integrated Circuit Silicon Monolithic Quad 2-Input NOR Gate
是否Rohs认证 符合 符合 - 符合
零件包装代码 SOIC DIP - TSSOP
包装说明 SOP, SOP14,.3 DIP, DIP14,.3 - TSSOP, TSSOP14,.25
针数 14 14 - 14
Reach Compliance Code unknow unknow - unknow
系列 AC AC - AC
JESD-30 代码 R-PDSO-G14 R-PDIP-T14 - R-PDSO-G14
长度 10.3 mm 19.25 mm - 5 mm
负载电容(CL) 50 pF 50 pF - 50 pF
逻辑集成电路类型 NOR GATE NOR GATE - NOR GATE
最大I(ol) 0.012 A 0.012 A - 0.012 A
功能数量 4 4 - 4
输入次数 2 2 - 2
端子数量 14 14 - 14
最高工作温度 85 °C 85 °C - 85 °C
最低工作温度 -40 °C -40 °C - -40 °C
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY
封装代码 SOP DIP - TSSOP
封装等效代码 SOP14,.3 DIP14,.3 - TSSOP14,.25
封装形状 RECTANGULAR RECTANGULAR - RECTANGULAR
封装形式 SMALL OUTLINE IN-LINE - SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度) NOT SPECIFIED NOT SPECIFIED - NOT SPECIFIED
电源 3.3/5 V 3.3/5 V - 3.3/5 V
Prop。Delay @ Nom-Su 11.2 ns 11.2 ns - 11.2 ns
传播延迟(tpd) 11.2 ns 11.2 ns - 11.2 ns
认证状态 Not Qualified Not Qualified - Not Qualified
施密特触发器 NO NO - NO
座面最大高度 1.9 mm 4.45 mm - 1.2 mm
最大供电电压 (Vsup) 5.5 V 5.5 V - 5.5 V
最小供电电压 (Vsup) 2 V 2 V - 2 V
标称供电电压 (Vsup) 3.3 V 3.3 V - 3.3 V
表面贴装 YES NO - YES
技术 CMOS CMOS - CMOS
温度等级 INDUSTRIAL INDUSTRIAL - INDUSTRIAL
端子形式 GULL WING THROUGH-HOLE - GULL WING
端子节距 1.27 mm 2.54 mm - 0.65 mm
端子位置 DUAL DUAL - DUAL
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED - NOT SPECIFIED
宽度 5.3 mm 7.62 mm - 4.4 mm
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