TLP352,TLP352F
Photocouplers
GaAℓAs Infrared LED & Photo IC
TLP352,TLP352F
1. Applications
•
•
•
•
Industrial Inverters
MOSFET Gate Drivers
IGBT Gate Drivers
Induction Cooktop and Home Appliances
2. General
The TLP352 is a photocoupler in a DIP8 package that consists of a GaAℓAs infrared light-emitting diode (LED)
optically coupled to an integrated high-gain, high-speed photodetector IC chip. It provides guaranteed performance
and specifications at temperatures up to 125
.
The TLP352 has an internal Faraday shield that provides a
guaranteed Common-mode transient immunity of
±20
kV/µs. It has a totem-pole output that can both sink and
source current. The TLP352 is ideal for IGBT and power MOSFET gate drive.
3. Features
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
Buffer logic type (totem pole output)
Output peak current:
±2.5
A (max)
Operating temperature: -40 to 125
Supply current: 3.0 mA (max)
Supply voltage: 15 to 30 V
Threshold input current: 5 mA (max)
Propagation delay time: 200 ns (max)
Common-mode transient immunity:
±20
kV/µs (min)
Isolation voltage: 3750 Vrms (min)
UL-approved: UL1577, File No.E67349
cUL-approved: CSA Component Acceptance Service No.5A File No.E67349
VDE-approved: EN60747-5-5 (Note 1)
Note 1: When an EN60747-5-5 approved type is needed, please designate the Option (D4)
(D4).
(10) Safety standards
Start of commercial production
©2016 Toshiba Corporation
1
2011-05
2016-09-27
Rev.7.0
TLP352,TLP352F
4. Packaging (Note)
TLP352
TLP352(LF1,TP1)
TLP352(LF5,TP5)
11-10C4S
11-10C401S
11-10C405S
TLP352F
TLP352F(LF4,TP4)
11-10C402S
11-10C404S
Note:
Through hole type: TLP352, TLP352F
Lead forming option: (LF1), (LF4), (LF5)
Taping option: (TP1), (TP4), (TP5)
5. Pin Assignment
1: N.C.
2: Anode
3: Cathode
4: N.C.
5: GND
6: V
O
(Output)
7: N.C.
8: V
CC
©2016 Toshiba Corporation
2
2016-09-27
Rev.7.0
TLP352,TLP352F
6. Internal Circuit (Note)
Note:
A 0.1-µF bypass capacitor must be connected between pin 8 and pin 5.
7. Principle of Operation
7.1. Truth Table
Input
H
L
LED
ON
OFF
M1
ON
OFF
M2
OFF
ON
Output
H
L
7.2. Mechanical Parameters
Characteristics
Creepage distances
Clearance distances
Internal isolation thickness
7.62-mm Pitch
TLP352
7.0 (min)
7.0 (min)
0.4 (min)
10.16-mm Pitch
TLP352F
8.0 (min)
8.0 (min)
0.4 (min)
Unit
mm
©2016 Toshiba Corporation
3
2016-09-27
Rev.7.0
TLP352,TLP352F
8. Absolute Maximum Ratings (Note) (Unless otherwise specified, T
a
= 25
)
Characteristics
LED
Input forward current
Input forward current derating
Peak transient input forward
current
Peak transient input forward
current derating
Input reverse voltage
Input power dissipation
Input power dissipation
derating
Detector Peak high-level output current
Peak low-level output current
Output voltage
Supply voltage
Output power dissipation
Output power dissipation
derating
Common Operating temperature
Storage temperature
Lead soldering temperature
Isolation voltage
(10 s)
AC, 60 s, R.H.
≤
60 %
(T
a
≥
110
)
(T
a
≥
110
)
(T
a
= -40 to 125
)
(T
a
= -40 to 125
)
(T
a
≥
110
)
(T
a
≥
116
)
Symbol
I
F
∆I
F
/∆T
a
I
FPT
∆I
FPT
/∆T
a
V
R
P
D
∆P
D
/∆T
a
I
OPH
I
OPL
V
O
V
CC
P
O
∆P
O
/∆T
a
T
opr
T
stg
T
sol
BV
S
(Note 3)
(Note 4)
(Note 2)
(Note 2)
(Note 1)
Note
Rating
20
-0.6
1
-25
5
40
-1.0
-2.5
+2.5
35
35
260
-6.5
-40 to 125
-55 to 150
260
3750
Vrms
mW
mW/
V
Unit
mA
mA/
A
mA/
V
mW
mW/
A
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Pulse width (PW)
≤
1
µs,
300 pps
Note 2: Exponential waveform. Pulse width
≤
0.3
µs,
f
≤
15 kHz
Note 3:
≥
2 mm below seating plane.
Note 4: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7
and 8 are shorted together.
Note:
©2016 Toshiba Corporation
4
2016-09-27
Rev.7.0
TLP352,TLP352F
9. Recommended Operating Conditions (Note)
Characteristics
Input on-state current
Input off-state voltage
Supply voltage
Peak high-level output current
Peak low-level output current
Operating frequency
Symbol
I
F(ON)
V
F(OFF)
V
CC
I
OPH
I
OPL
f
(Note 3)
(Note 2)
Note
(Note 1)
Min
6.5
0
15
Typ.
Max
10
0.8
30
-2.0
+2.0
50
kHz
A
Unit
mA
V
The recommended operating conditions are given as a design guide necessary to obtain the intended
performance of the device. Each parameter is an independent value. When creating a system design using
this device, the electrical characteristics specified in this datasheet should also be considered.
Note: A ceramic capacitor (0.1
µF)
should be connected between pin 8 and pin 5 to stabilize the operation of a high-
gain linear amplifier. Otherwise, this photocoupler may not switch properly. The bypass capacitor should be
placed within 1 cm of each pin.
Note: If the rising slope of the supply voltage(V
CC
) for the detector is steep,stable operation of the internal circuits
cannot be guaranteed.
Be sure to set 3.0 V/µs or less for a rising slope of the V
CC
.
Note 1: The rise and fall times of the input on-current should be less than 0.5
µs.
Note 2: Denotes the operating range, not the recommended operating condition.
Note 3: Exponential waveform. I
OPH
≥
-2.0 A (≤ 0.3
µs),
I
OPL
≤
2.0 A (≤ 0.3
µs),
T
a
= 125
Note:
10. Electrical Characteristics (Note) (Unless otherwise specified, T
a
= -40 to 125
)
Characteristics
Input forward voltage
Input forward voltage
temperature coefficient
Input reverse current
Input capacitance
Peak high-level output current
Symbol
V
F
∆V
F
/∆T
a
I
R
C
t
I
OPH
(Note 1)
Fig.
13.1.1
Note
Test
Circuit
Test Condition
I
F
= 10 mA, T
a
= 25
I
F
= 10 mA
V
R
= 5 V, T
a
= 25
V = 0 V, f = 1 MHz, T
a
= 25
I
F
= 5 mA, V
CC
= 30 V,
V
8-6
= -3.5 V
I
F
= 5 mA, V
CC
= 15 V,
V
8-6
= -7.0 V
Peak low-level output current
I
OPL
(Note 1)
Fig.
13.1.2
I
F
= 0 mA, V
CC
= 30 V,
V
6-5
= 2.5 V
I
F
= 0 mA, V
CC
= 15 V,
V
6-5
= 7.0 V
High-level output voltage
Low-level output voltage
High-level supply current
Low-level supply current
Threshold input current (L/H)
Threshold input voltage (H/L)
Supply voltage
UVLO threshold voltage
UVLO hysteresis
V
OH
V
OL
I
CCH
I
CCL
I
FLH
V
FHL
V
CC
V
UVLO+
V
UVLO-
UVLO
HYS
Fig.
13.1.3
Fig.
13.1.4
Fig.
13.1.5
Fig.
13.1.6
I
F
= 5 mA, R
L
= 200
Ω,
V
CC1
= +15 V, V
EE1
= -15 V
V
F
= 0.8 V, R
L
= 200
Ω,
V
CC1
= +15 V, V
EE1
= -15 V
I
F
= 10 mA, V
CC
= 30 V,
V
O
= Open
I
F
= 0 mA, V
CC
= 30 V,
V
O
= Open
V
CC
= 15 V, V
O
> 1 V
V
CC
= 15 V, V
O
< 1 V
I
F
= 5 mA, V
O
> 2.5 V
I
F
= 5 mA, V
O
< 2.5 V
Min
1.4
1.0
2.0
11.0
0.8
15
11.0
9.5
Typ.
1.55
-2.0
95
-1.6
1.6
13.7
-14.9
1.5
1.5
1.0
12.5
11.0
1.5
Max
1.7
10
-1.0
-2.0
-12.5
3.0
3.0
5
30
13.5
12.0
V
mA
V
Unit
V
mV/
µA
pF
A
Note:
Note:
All typical values are at T
a
= 25
.
This device is designed for low power consumption, making it more sensitive to ESD than its predecessors.
Extra care should be taken in the design of circuitry and pc board implementation to avoid ESD problems.
Note 1: I
O
application time
≤
50
µs,
single pulse.
©2016 Toshiba Corporation
5
2016-09-27
Rev.7.0
嵌入式系统
