Atmel U6815BM
Dual Hex DMOS Output Driver with Serial Input Control
DATASHEET
Features
●
Six high-side and six low-side drivers
●
Outputs freely configurable as switch, half bridge, or H-bridge
●
Capable to switch all kinds of loads such as DC motors, bulbs, resistors, capacitors
and inductors
●
0.6A continuous current per switch
●
Low-side: R
DSon
< 1.5Ω versus total temperature range
●
High-side: R
DSon
< 2.0Ω versus total temperature range
●
Very low quiescent current I
S
< 20µA in Standby Mode
●
Outputs short-circuit protected
●
Overtemperature prewarning and protection
●
Under- and overvoltage protection
●
Various diagnosis functions such as shorted output, open load, overtemperature
and power supply fail
●
Serial data interface
●
Daisy chaining possible
●
SO28 power package
Description
The Atmel
®
U6815BM is a fully protected driver interface designed in 0.8-µm BCDMOS
technology. It is used to control up to 12 different loads by a microcontroller in automotive
and industrial applications.
Each of the 6 high-side and 6 low-side drivers is capable of driving currents up to 600mA.
The drivers are freely configurable and can be controlled separately from a standard serial
data interface. Therefore, all kinds of loads such as bulbs, resistors, capacitors, and induc-
tors can be combined. The IC design especially supports the applications of H-bridges to
drive DC motors.
Protection is guaranteed for short-circuit conditions, overtemperature, under- and overvolt-
age. Various diagnostic functions and a very low quiescent current in standby mode enable
a wide range of applications. The U6815BM has automotive qualification for conducted
interferences, EMC protection, and 2-kV ESD protection.
4545E–AUTO–06/12
Figure 1.
Block Diagram
HS1
15
HS2
13
HS3
12
HS4
3
HS5
2
HS6
28
Fault
detector
Fault
detector
Fault
detector
Fault
detector
Fault
detector
Fault
detector
5
VS
10
DI
26
VS
25
S
C
T
O
L
D
H
S
6
L
S
6
H
S
5
L
S
5
H
S
4
L
S
4
H
S
3
L
S
3
H
S
2
L
S
2
H
S
1
L
S
1
S
R
R
6
OV -
protection
7
VS
Osc
GND
GND
CLK
S
I
VS
CS
24
Input Register
Ouput Register
17
Control
logic
L
S
6
H
S
5
L
S
5
H
S
4
L
S
4
H
S
3
L
S
3
H
S
2
L
S
2
H
S
1
L
S
1
T
P
UV -
protection
8
GND
9
GND
INH
P
S
F
I
N
H
S
C
D
H
S
6
Thermal
protection
Power ON
Reset
VCC
20
GND
21
GND
22
GND
23
GND
19
DO
18
Fault
detector
Fault
detector
Fault
detector
Fault
detector
Fault
detector
Fault
detector
V
CC
16
LS1
14
LS2
11
LS3
4
LS4
1
LS5
27
LS6
VCC
Atmel U6815BM [DATASHEET]
4545E–AUTO–06/12
2
1.
Pin Configuration
Figure 1-1. Pinning SO28
HS6
28
LS6
27
DI
26
CLK
25
CS
24
GND GND GND GND VCC
23
22
21
20
19
DO
18
INH
17
LS1
16
HS1
15
U6815BM
Lead frame
1
2
3
4
5
6
7
8
9
10
11
12
13
14
LS5
HS5
HS4
LS4
VS
GND GND GND GND
VS
LS3
HS3
HS2
LS2
Table 1-1.
Pin
1
2
3
4
5
6, 7, 8, 9
10
11
12
13
14
15
16
17
18
19
Pin Description
Symbol
LS5
HS5
HS4
LS4
VS
GND
VS
LS3
HS3
HS2
LS2
HS1
LS1
INH
DO
VCC
GND
CS
CLK
DI
LS6
HS6
Function
Low-side driver output 5, power-MOS open drain with internal reverse diode, overvoltage
protection by active zenering, short-circuit protection, diagnosis for short and open load
High-side driver output 5, power-MOS open drain with internal reverse diode, overvoltage
protection by active zenering, short-circuit protection, diagnosis for short and open load
High-side driver output 4 (see pin 2)
Low-side driver output 4 (see pin 1)
Power supply output stages HS4, HS5, HS6, internal supply; external connection to pin 10
necessary
Ground, reference potential, internal connection to pin 20 to 23, cooling tab
Power supply output stages HS1, HS2 and HS3
Low-side driver output 3 (see pin 1)
High-side driver output 3 (see pin 2)
High-side driver output 2 (see pin 2)
Low-side driver output 2 (see pin 1)
High-side driver output 1 (see pin 2)
Low-side driver output 1 (see pin 1)
Inhibit input, 5-V logic input with internal pull down, low = standby, high = normal operating
Serial data output, 5-V CMOS logic level tristate output for output (status) register data, sends
16-bit status information to the microcontroller (LSB is transferred first). Output will remain
tristated unless device is selected by CS = low, therefore, several ICs can operate on one
data output line only.
Logic supply voltage (5V)
Ground (see pins 6 to 9)
Chip select input, 5-V CMOS logic level input with internal pull-up, low = serial communication
is enabled, high = disabled
Serial clock input, 5-V CMOS logic level input with internal pull-down, controls serial data
input interface and internal shift register (f
max
= 2MHz)
Serial data input, 5-V CMOS logic level input with internal pull-down, receives serial data from
the control device, DI expects a 16-bit control word with LSB being transferred first
Low-side driver output 6 (see pin 1)
High-side driver output 6 (see pin 2)
20, 21, 22, 23
24
25
26
27
28
Atmel U6815BM [DATASHEET]
4545E–AUTO–06/12
3
2.
2.1
Functional Description
Serial Interface
Data transfer starts with the falling edge of the CS signal. Data must appear at DI synchronized to CLK and is accepted on the
falling edge of the CLK signal. LSB (bit 0, SRR) must be transferred first. Execution of new input data is enabled on the rising
edge of the CS signal. When CS is high, Pin DO is in tristate condition. This output is enabled on the falling edge of CS. Output
data will change their state with the rising edge of CLK and stay stable until the next rising edge of CLK appears. LSB (bit 0, TP)
is transferred first.
Figure 2-1. Data Transfer
CS
DI
SRR
0
LS1
1
HS1
2
LS2
3
HS2
4
LS3
5
HS3
6
LS4
7
HS4
8
LS5
9
HS5
10
LS6
11
HS6
12
OLD
13
SCT
14
SI
15
CLK
DO
TP
SLS1
SHS1
SLS2
SHS2
SLS3
SHS3
SLS4
SHS4
SLS5
SHS5
SLS6
SHS6
SCD
INH
PSF
Table 2-1.
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Input Data Protocol
Input Register
SRR
LS1
HS1
LS2
HS2
LS3
HS3
LS4
HS4
LS5
HS5
LS6
HS6
OLD
SCT
SI
Function
Status register reset (high = reset; the bits PSF, SCD and overtemperature shutdown
in the output data register are set to low)
Controls output LS1 (high = switch output LS1 on)
Controls output HS1 (high = switch output HS1 on)
See LS1
See HS1
See LS1
See HS1
See LS1
See HS1
See LS1
See HS1
See LS1
See HS1
Open-load detection (low = on)
Programmable time delay for short circuit and overvoltage shutdown (short-circuit
shutdown delay high/low = 100 ms/12.5 ms, overvoltage shutdown delay
high/low = 15ms/3.5ms
Software inhibit; low = standby, high = normal operation (data transfer is not affected
by standby function because the digital part is still powered)
Atmel U6815BM [DATASHEET]
4545E–AUTO–06/12
4
After power-on reset, the input register has the following
status:
Bit 15
(SI)
H
Bit 14
(SCT)
H
Bit 13
(OLD)
H
Bit 12
(HS6)
L
Bit 11
(LS6)
L
Bit 10
(HS5)
L
Bit 9
(LS5)
L
Bit 8
(HS4)
L
Bit 7
(LS4)
L
Bit 6
(HS3)
L
Bit 5
(LS3)
L
Bit 4
(HS2)
L
Bit 3
(LS2)
L
Bit 2
(HS1)
L
Bit 1
(LS1)
L
Bit 0
(SRR)
L
Table 2-2.
Bit
0
1
Output Data Protocol
Output (Status) Register
TP
Status LS1
Function
Temperature prewarning: high = warning (overtemperature shut down)
(1)
Normal operation: high = output is on, low = output is off
Open-load detection: high = open load, low = no open load (correct load condition is
detected if the corresponding output is switched off)
Normal operation: high = output is on, low = output is off
Open-load detection: high = open load, low = no open load (correct load condition is
detected if the corresponding output is switched off)
Description see LS1
Description see HS1
Description see LS1
Description see HS1
Description see LS1
Description see HS1
Description see LS1
Description see HS1
Description see LS1
Description see HS1
Short circuit detected: set high, when at least one output is switched off by a short-
circuit condition
Inhibit: this bit is controlled by software (bit SI in input register) and hardware inhibit
(pin 17). High = standby, low = normal operation
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Note:
Status HS1
Status LS2
Status HS2
Status LS3
Status HS3
Status LS4
Status HS4
Status LS5
Status HS5
Status LS6
Status HS6
SCD
INH
1.
PSF
Power supply fail: over- or undervoltage at pin VS detected
Bit 0 to 15 = high: overtemperature shutdown
Atmel U6815BM [DATASHEET]
4545E–AUTO–06/12
5
PCB设计
