Philips Semiconductors
Objective specification
PowerMOS transistor
Logic level TOPFET
DESCRIPTION
Monolithic overload protected logic
level power MOSFET in a surface
mount plastic envelope, intended as
a general purpose switch for
automotive systems and other
applications.
BUK113-50DL
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
D
T
j
R
DS(ON)
PARAMETER
Continuous drain source voltage
Drain current limiting
Total power dissipation
Continuous junction temperature
Drain-source on-state resistance
MIN.
-
4
-
-
-
MAX. UNIT
50
8
4
150
200
V
A
W
˚C
mΩ
APPLICATIONS
General controller for driving
lamps
small motors
solenoids
FEATURES
Vertical power DMOS output
stage
Overload protected up to
125˚C ambient
Overload protection by current
limiting and overtemperature
sensing
Latched overload protection
reset by input
5 V logic compatible input level
Control of power MOSFET
and supply of overload
protection circuits
derived from input
Low operating input current
permits direct drive by
micro-controller
ESD protection on all pins
Overvoltage clamping for turn
off of inductive loads
FUNCTIONAL BLOCK DIAGRAM
DRAIN
O/V
CLAMP
INPUT
RIG
POWER
MOSFET
LOGIC AND
PROTECTION
SOURCE
Fig.1. Elements of the TOPFET.
PINNING - SOT223
PIN
1
2
3
4
input
drain
source
drain (tab)
DESCRIPTION
PIN CONFIGURATION
4
SYMBOL
D
TOPFET
I
P
1
2
3
S
January 1996
1
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistor
Logic level TOPFET
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
I
D
I
I
I
IRM
P
D
T
stg
T
j
PARAMETER
Continuous drain source voltage
1
Continuous drain current
2
Continuous input current
Non-repetitive peak input current
Total power dissipation
Storage temperature
Continuous junction temperature
CONDITIONS
-
-
clamping
t
p
≤
1 ms
T
sp
= 90 ˚C
-
normal operation
MIN.
-
-
-
-
-
-55
-
BUK113-50DL
MAX.
50
self limiting
3
10
4
150
150
UNIT
V
A
mA
mA
W
˚C
˚C
ESD LIMITING VALUE
SYMBOL
V
C
PARAMETER
Electrostatic discharge capacitor
voltage
CONDITIONS
Human body model;
C = 250 pF; R = 1.5 kΩ
MIN.
-
MAX.
2
UNIT
kV
OVERVOLTAGE CLAMPING LIMITING VALUES
At a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients.
SYMBOL
E
DSM
E
DRM
PARAMETER
Non-repetitive clamping energy
Repetitive clamping energy
CONDITIONS
T
b
≤
25 ˚C; I
DM
< I
D(lim)
;
inductive load
T
b
≤
75 ˚C; I
DM
= 50 mA;
f = 250 Hz
MIN.
-
-
MAX.
100
4
UNIT
mJ
mJ
OVERLOAD PROTECTION LIMITING VALUES
With the protection supply provided via the input pin, TOPFET can protect itself from short circuit loads.
Overload protection operates by means of drain current limiting and activating the overtemperature protection.
SYMBOL
V
ISP
V
DDP
PARAMETER
CONDITIONS
MIN.
4
-
MAX.
-
35
UNIT
V
V
Protection supply voltage
3
for valid protection
Protected drain source supply voltage V
IS
= 5 V
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
Thermal resistance
R
th j-sp
R
th j-a
Junction to solder point
Application information
Junction to ambient
on PCB of fig. 3
on minimum footprint PCB
-
-
70
100
-
-
K/W
K/W
measured to pin 4 solder point
-
12
15
K/W
CONDITIONS
MIN.
TYP.
MAX.
UNIT
1
Prior to the onset of overvoltage clamping. For voltages above this value, safe operation is limited by the overvoltage clamping energy.
2
Refer to OVERLOAD PROTECTION CHARACTERISTICS.
3
The input voltage for which the overload protection circuits are functional.
January 1996
2
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistor
Logic level TOPFET
OVERLOAD PROTECTION CHARACTERISTICS
TOPFET switches off to protect itself when there is an overload fault condition.
It remains latched off until reset by the input.
SYMBOL
I
D(lim)
E
DS(TO)
T
j(TO)
PARAMETER
Overload protection
Drain current limiting
Short circuit load protection
Overload threshold energy
Overtemperature protection
Threshold junction temperature V
IS
= 5 V
150
V
DD
= 13 V; V
IS
= 5 V
-
V
IS
= 5 V
4
CONDITIONS
MIN.
BUK113-50DL
TYP.
6
MAX.
8
-
-
UNIT
A
J
˚C
tbf
165
STATIC CHARACTERISTICS
T
b
= 25 ˚C unless otherwise specified
SYMBOL
V
(CL)DSS
V
(CL)DSS
I
DSS
I
DSS
I
DSS
R
DS(ON)
PARAMETER
Drain-source clamping voltage
Drain-source clamping voltage
Off-state drain current
Off-state drain current
Off-state drain current
Drain-source on-state
resistance
1
CONDITIONS
V
IS
= 0 V; I
D
= 10 mA
V
IS
= 0 V; I
DM
= 200 mA;
t
p
≤
300
µs; δ ≤
0.01
V
DS
= 45 V; V
IS
= 0 V
V
DS
= 50 V; V
IS
= 0 V
V
DS
= 40 V; V
IS
= 0 V; T
j
= 100 ˚C
V
IS
= 5 V; I
DM
= 1 A;
t
p
≤
300
µs; δ ≤
0.01
MIN.
50
-
-
-
-
-
TYP.
55
56
0.5
1
10
150
MAX.
-
70
2
20
100
200
UNIT
V
V
µA
µA
µA
mΩ
INPUT CHARACTERISTICS
T
b
= 25 ˚C unless otherwise specified. The supply for the logic and overload protection is taken from the input.
SYMBOL
V
IS(TO)
I
IS
I
ISL
V
ISR
V
(CL)IS
R
IG
PARAMETER
Input threshold voltage
Input supply current
Input supply current
Protection latch reset voltage
2
Input clamping voltage
Input series resistance
CONDITIONS
V
DS
= 5 V; I
D
= 1 mA
normal operation;
protection latched;
V
IS
= 5 V
V
IS
= 4 V
V
IS
= 5 V
V
IS
= 3.5 V
MIN.
1.7
-
-
-
-
1
6
-
TYP.
2.2
330
170
500
250
2.2
7.5
33
MAX.
2.7
450
270
650
400
3.5
-
-
UNIT
V
µA
µA
µA
µA
V
V
kΩ
I
I
= 1.5 mA
to gate of power MOSFET
SHADED BOXES
Values shown within shaded boxes are estimated for the objective specification.
These will not be fixed until the evaluation of prototype samples.
1
Continuous input voltage. The specified pulse width is for the drain current.
2
The input voltage below which the overload protection circuits will be reset.
January 1996
3
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistor
Logic level TOPFET
MOUNTING INSTRUCTIONS
Dimensions in mm.
3.8
min
BUK113-50DL
PRINTED CIRCUIT BOARD
Dimensions in mm.
36
1.5
min
18
60
9
2.3
1.5
min
(3x)
6.3
4.6
4.5
10
1.5
min
4.6
7
15
50
Fig.2. Soldering pattern for surface mounting.
Fig.3. PCB for thermal resistance and power rating.
PCB: FR4 epoxy glass (1.6 mm thick),
copper laminate (35
µ
m thick).
January 1996
4
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistor
Logic level TOPFET
MECHANICAL DATA
Dimensions in mm
Net Mass: 0.11 g
handbook, full pagewidth
BUK113-50DL
0.95
0.85
S
seating plane
6.7
6.3
3.1
2.9
0.1 S
0.32
0.24
B
0.2
M
A
4
A
0.10
0.01
3.7
3.3
o
7.3
6.7
16
o
max
16
1
1.80
max
10
o
max
2
0.80
0.60
4.6
3
2.3
0.1
M
B
(4x)
MSA035 - 1
Fig.4. SOT223 surface mounting package
1
.
1
For further information, refer to surface mounting instructions for SOT223 envelope. Epoxy meets UL94 V0 at 1/8".
January 1996
5
Rev 1.000
