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IRLI640GPBF

MOSFET N-Chan 200V 9.9 Amp

器件类别:分立半导体    晶体管   

厂商名称:Vishay(威世)

厂商官网:http://www.vishay.com

器件标准:

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
Vishay(威世)
零件包装代码
TO-220AB
包装说明
FLANGE MOUNT, R-PSFM-T3
针数
3
Reach Compliance Code
compliant
ECCN代码
EAR99
Factory Lead Time
6 weeks
其他特性
LOGIC LEVEL COMPATIBLE
雪崩能效等级(Eas)
290 mJ
外壳连接
ISOLATED
配置
SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压
200 V
最大漏极电流 (Abs) (ID)
9.9 A
最大漏极电流 (ID)
9.9 A
最大漏源导通电阻
0.18 Ω
FET 技术
METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码
TO-220AB
JESD-30 代码
R-PSFM-T3
JESD-609代码
e2
元件数量
1
端子数量
3
工作模式
ENHANCEMENT MODE
最高工作温度
150 °C
封装主体材料
PLASTIC/EPOXY
封装形状
RECTANGULAR
封装形式
FLANGE MOUNT
峰值回流温度(摄氏度)
260
极性/信道类型
N-CHANNEL
最大功率耗散 (Abs)
40 W
最大脉冲漏极电流 (IDM)
40 A
认证状态
Not Qualified
表面贴装
NO
端子面层
TIN COPPER
端子形式
THROUGH-HOLE
端子位置
SINGLE
处于峰值回流温度下的最长时间
NOT SPECIFIED
晶体管应用
SWITCHING
晶体管元件材料
SILICON
文档预览
IRLI640G, SiHLI640G
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
(Ω)
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 5.0 V
66
9.0
38
Single
D
FEATURES
200
0.18
TO-220 FULLPAK
• Isolated Package
• High Voltage Isolation = 2.5 kV
RMS
(t = 60 s;
f = 60 Hz)
• Sink to Lead Creepage Dist. 4.8 mm
• Logic-Level Gate Drive
• R
DS(on)
Specified at V
GS
= 4V and 5 V
• Fast Switching
• Ease of paralleling
• Lead (Pb)-free Available
Available
RoHS*
COMPLIANT
DESCRIPTION
G
G D S
S
N-Channel
MOSFET
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The TO-220 FULLPAK eliminates the need for additional
insulating hardware in commercial-industrial applications.
The molding compound used provides a high isolation
capability and a low thermal resistance between the tab and
external heatsink. This isolation is equivalent to using a 100
micron mica barrier with standard TO-220 product. The
FULLPAK is mounted to a heatsink using a single clip or by
a single screw fixing.
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
TO-220 FULLPAK
IRLI640GPbF
SiHLI640G-E3
IRLI640G
SiHLI640G
ABSOLUTE MAXIMUM RATINGS
T
C
= 25 °C, unless otherwise noted
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain
Linear Derating Factor
Single Pulse Avalanche Energy
b
Repetitive Avalanche Current
a
Repetitive Avalanche Energy
a
Maximum Power Dissipation
Peak Diode Recovery dV/dt
c
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
Current
a
V
GS
at 5.0 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
E
AS
I
AR
E
AR
P
D
dV/dt
T
J
, T
stg
LIMIT
200
± 10
9.9
6.3
40
0.32
290
9.9
4.0
40
5.0
- 55 to + 150
300
d
10
1.1
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
lbf · in
N·m
T
C
= 25 °C
for 10 s
6-32 or M3 screw
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= 25 V, starting T
J
= 25 °C, L = 4.4 mH, R
G
= 25
Ω,
I
AS
= 9.9 A (see fig. 12).
c. I
SD
17 A, dI/dt
150 A/µs, V
DD
V
DS
, T
J
150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91314
S09-0039-Rev. A, 19-Jan-09
www.vishay.com
1
IRLI640G, SiHLI640G
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thJC
TYP.
-
-
MAX.
65
3.1
UNIT
°C/W
SPECIFICATIONS
T
J
= 25 °C, unless otherwise noted
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
V
DS
ΔV
DS
/T
J
V
GS(th)
I
GSS
I
DSS
V
GS
= 0 V, I
D
= 250 µA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= ± 10 V
V
DS
= 200 V, V
GS
= 0 V
V
DS
= 160 V, V
GS
= 0 V, T
J
= 160 °C
V
GS
= 5.0 V
V
GS
= 4.0 V
I
D
= 5.9 A
b
I
D
= 5.0 A
b
200
-
1.0
-
-
-
-
-
16
-
0.27
-
-
-
-
-
-
-
-
-
2.0
± 100
25
250
0.18
0.27
-
V
V/°C
V
nA
µA
Ω
S
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
Current
a
R
DS(on)
g
fs
V
DS
= 50 V, I
D
= 10 A
b
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
-
-
-
-
1800
400
120
-
-
-
8.0
83
44
52
4.5
7.5
-
-
-
66
9.0
38
-
-
-
-
-
nH
-
ns
nC
pF
V
GS
= 10 V
I
D
= 17 A, V
DS
= 160 V,
see fig. 6 and 13
b
-
-
-
V
DD
= 100 V, I
D
= 17 A,
R
G
= 4.6
Ω
,
R
D
= 5.7
Ω,
see fig. 10
b
-
-
-
Between lead,
6 mm (0.25") from
package and center of
die contact
D
-
-
G
S
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
-
-
-
-
-
-
-
-
310
3.2
9.9
A
40
2.0
470
4.8
V
ns
µC
G
S
T
J
= 25 °C, I
S
= 9.9 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 17 A, dI/dt = 100 A/µs
b
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width
300 µs; duty cycle
2 %.
www.vishay.com
2
Document Number: 91314
S09-0039-Rev. A, 19-Jan-09
IRLI640G, SiHLI640G
Vishay Siliconix
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics, T
C
= 25 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics, T
C
= 150 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91314
S09-0039-Rev. A, 19-Jan-09
www.vishay.com
3
IRLI640G, SiHLI640G
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
www.vishay.com
4
Document Number: 91314
S09-0039-Rev. A, 19-Jan-09
IRLI640G, SiHLI640G
Vishay Siliconix
R
D
V
DS
V
GS
R
G
D.U.T.
+
- V
DD
5V
Pulse width
1 µs
Duty factor
0.1 %
Fig. 10a - Switching Time Test Circuit
V
DS
90
%
10
%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
Vary t
p
to obtain
required I
AS
R
G
V
DS
t
p
V
DD
D.U.T.
I
AS
5V
t
p
0.01
Ω
I
AS
Fig. 12b - Unclamped Inductive Waveforms
www.vishay.com
5
V
DS
+
-
V
DD
V
DS
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 91314
S09-0039-Rev. A, 19-Jan-09
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