SD5000/5001/5400/5401
Over Three Decades of Quality Through Innovation
QUAD N-CHANNEL LATERAL
DMOS SWITCH
ZENER PROTECTED
Product Summary
Part Number
SD5000I
SD5000N
SD5001N
SD5400CY
SD5401CY
V
(BR)DS
Min (V)
20
20
10
20
10
V
GS(th)
Max (V)
1.5
1.5
1.5
1.5
1.5
r
DS(on)
Max (Ω)
70 @ V
GS
= 5 V
70 @ V
GS
= 5 V
70 @ V
GS
= 5 V
75 @ V
GS
= 5 V
75 @ V
GS
= 5 V
C
rss
Max (pF)
0.5
0.5
0.5
0.5
0.5
t
ON
Max (ns)
2
2
2
2
2
Features
Quad SPST Switch with Zener Input Protection
Low Interelectrode Capacitance and Leakage
Ultra-High Speed Switching―t
ON
: 1 ns
Ultra-Low Reverse Capacitance: 0.2 pF
Low Guaranteed r
DS
@5 V
Low Turn-On Threshold Voltage
Benefits
High-Speed System Performance
Low Insertion Loss at High Frequencies
Low Transfer Signal Loss
Simple Driver Requirement
Single Supply Operation
Applications
Fast Analog Switch
Fast Sample-and-Holds
Pixel-Rate Switching
Video Switch
Multiplexer
DAC Deglitchers
High-Speed Driver
Description
The SD5000/5400 series of monolithic switches features four
individual double-diffused enhancement-mode MOSFETs built
on a common substrate. These bidirectional devices provide low
on-resistance and low interelectrode capacitances to minimize
insertion loss and crosstalk.
Built on Siliconix’ proprietary DMOS process, the SD5000/5400
series utilizes lateral construction to achieve low capacitance and
ultra-fast switching speeds. For manufacturing reliability, these
devices feature poly-silicon gates protected by Zener diodes
The SD 5000/5400 are rated to handle ±10-V analog signals,
while the SD5001/5401 are rated for ±5-V signals.
For similar products packaged in TO-206AF (TO-72) and TO-
253 (SOT-143) see the SD211DE/SST211 series.
Dual-In-Line
D
1
SUBSTRATE
G
1
S
1
S
2
G
2
NC
D
2
Top View
D
4
NC
G
4
S
4
S
3
G
3
NC
D
3
Plastic: SD5000N
SD5001N
Sidebraze: SD5000I
S
2
SUBSTRATE
G
2
D
2
D
3
G
3
S
3
Narrow Body SOIC
S
1
NC
G
1
D
1
D
4
G
4
S
4
Top View
SD5400CY
SD5401CY
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 20113 12/16/2016 Rev#A10 ECN# SD5000/5001/5400/5401
Absolute Maximum Ratings (T
A
= 25ºC Unless Otherwise Noted)
Gate-Drain, Gate-Source Voltage
(SD5000, SD5400)……………………………….……………+30V/-25V
(SD5001, SD5401)……………………………………….……+25V/-15V
Gate-Substrate Voltage
(SD5000, SD5400)………+30V/-0.3V
(SD5001I, SD5401)...….…+25V/-0.3V
Drain-Source Voltage
(SD5000, SD5400)……………….20V
(SD5001I, SD5401)……………….10V
Drain-Source-Substrate Voltage (SD5000, SD5400)……………….25V
(SD5001I, SD5401)……………….15V
Drain Current…………………………………………………….…...........50 mA
Lead Temperature (1/16” from case for 10 seconds)……………………….300ºC
Storage Temperature…………………………………………….…..-65 to 150ºC
Operating Junction Temperature…..…………………………….…..-55 to 150ºC
Power Dissipation”:
(Package)…………………………….………500 mW
(each Device)…..…………………….………300 mW
Notes:
a. SD5000/SD5001I derate 5 mW/C above 25ºC
b. SD5400/SD5401 derate 4 mW/C above 25ºC
a.
Specifications
a
Limits
SD5000
SD5001
SD5400
SD5401
Parameter
Static
Drain-Source Breakdown Voltage
Source-Drain Breakdown Voltage
Drain-Substrate Breakdown Voltage
Source-Substrate
Breakdown Voltage
V
(BR)DS
V
(BR)SD
V
(BR)DBO
V
(BR)SBO
V
GS
=V
BS
=-5V, I
D
=10nA
V
GD
=V
BD
=-5V, I
S
=10nA
V
GB
=0 V, I
D
=10µA, Source Open
V
GB
=0 V, I
S
=10µA, Drain Open
V
DS
= 10 V
Drain-Source Leakage
I
DS(off)
V
GS
= V
BS
=-5 V
V
DS
= 15 V
V
DS
= 20 V
V
SD
= 10 V
Source-Drain Leakage
I
SD(off)
V
GD
= V
BD
=-5 V
V
SD
= 15 V
V
SD
= 20 V
Gate Leakage
Threshold Voltage
I
GBS
V
GS(th)
V
DB
= V
SB
= 0 V, V
GB
=30V
V
DS
= V
GS
, I
D
= I µA, V
SB
=0V
SD5000 Series
V
GS
= 5 V
SD5400 Series
V
GS
= 5 V
V
GS
= 10 V
V
GS
= 15 V
V
GS
= 20 V
Resistance Match
Dynamic
Forward Transconductance
Gate Node Capacitance
Drain Node Capacitance
Source Node Capacitance
Reverse Transfer Capacitance
Crosstalk
g
fs
C
(GS+GD+GB)
C
(GD+DB)
C
(GS+SB)
C
rss
f = 3 kHz
V
DS
= 10 V
f = 1 MHz
V
GS
= V
BS
= -15V
SD5000 Series
V
DS
= 10 V
V
SB
= 0 V
l
D
= 20 mA
f = 1 kHz
SD5000 Series
SD5400 Series
12
11
2.5
2.0
3.7
0.2
-107
10
9
3.5
3
5
0.5
10
mS
9
3.5
3
5
0.5
dB
pF
∆r
DS(on)
V
GS
= 5 V
30
22
35
35
0.4
0.7
0.9
0.5
0.8
1
0.01
0.8
58
60
38
30
26
1
5
5
0.1
10
100
1.5
70
75
0.1
100
1.5
70
75
Ω
V
10
10
nA
20
20
25
25
10
10
15
15
10
V
Symbol
b
Test Conditions
b
Typ
c
Min
Max
Min
Max
Unit
Drain-Source On-Resistance
r
DS(on)
V
SB
= 0 V
I
D
= 1 mA
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 20113 12/16/2016 Rev#A10 ECN# SD5000/5001/5400/5401
Specifications
a
Limits
SD5000
SD5001
SD5400
SD5401
Parameter
Switching
Turn-On Time
t
d(on)
t
r
t
d(off)
t
f
V
SB
= 1-5 Vin, V
GN
0 to 5 V, R
G
= 25 Ω
V
DD
= 5 V, R
L
= 680 Ω
0.5
0.6
2
6
DMCA
1
1
1
1
ns
Symbol
b
Test Conditions
b
Typ
c
Min
Max
Min
Max
Unit
Turn-Off Time
Notes:
a. T
A
= 25ºC unless otherwise noted.
b. B is the body (substrate) and V
(BR)
is breakdown.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Switching Time Test Circuit
NOTES:
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use;
nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Linear Integrated Systems.
Linear Integrated Systems (LIS), established in 1987, third-generation precision semiconductor company providing high-quality
discrete components. Expertise brought to LIS is based on processes and products developed at Amelco, Union Carbide, Intersil
and Micro Power Systems by company Founder John H. Hall. Hall, a protégé of Silicon Valley legend Dr. Jean Hoerni, was the
director of IC Development at Union Carbide, co-founder and vice president of R&D at Intersil, and founder/president of Micro
Power Systems.
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 20113 12/16/2016 Rev#A10 ECN# SD5000/5001/5400/5401
