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STDRIVE601TR

描述:
半桥(3) 驱动器 DC 电机,通用 功率 MOSFET,IGBT 28-SO
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概述
半桥(3) 驱动器 DC 电机,通用 功率 MOSFET,IGBT 28-SO
器件参数
参数名称
属性值
类别
厂商名称
ST(意法半导体)
包装
卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带
输出配置
半桥(3)
应用
DC 电机,通用
接口
模拟,逻辑
负载类型
容性和阻性
技术
功率 MOSFET,IGBT
导通电阻(典型值)
35 欧姆
电流 - 峰值输出
350mA
电压 - 供电
9V ~ 20V
电压 - 负载
580V
工作温度
-40°C ~ 125°C(TJ)
特性
自举电路
故障保护
过流,超温,UVLO
安装类型
表面贴装型
封装/外壳
28-SOIC(0.295",7.50mm 宽)
供应商器件封装
28-SO
基本产品编号
STDRIVE601
文档预览
STDRIVE601
Datasheet
Triple half-bridge high-voltage gate driver
Features
High voltage rail up to 600 V
Driver current capability:
200 mA source current @ 25 °C
350 mA sink current @ 25 °C
dV/dt transient immunity ±50 V/ns
Gate driving voltage range from 9 V to 20 V
Overall input-output propagation delay: 85 ns
Matched propagation delay for all channels
3.3 V, 5 V TTL/CMOS inputs with hysteresis
Integrated bootstrap diodes
Comparator for fast overcurrent protection
Smart shutdown function
Interlocking and deadtime function
Dedicated Enable pin
UVLO function on low-side and high-sides
SO-28
Applications
Product status link
STDRIVE601
Product summary
Order code
Package
Packing
Tube
STDRIVE601
STDRIVE601TR
SO-28
Tape & Reel
3-phase motor drives
Inverters
Description
The STDRIVE601 is a high voltage device manufactured with BCD6s offline
technology. It is a single-chip with three half-bridge gate drivers for N-channel power
MOSFETs or IGBTs suitable for 3-phase applications.
All device outputs can sink and source 350 mA and 200 mA respectively. Prevention
from cross conduction is ensured by interlocking and deadtime function.
The device has dedicated input pins for each output and a shutdown pin. The logic
inputs are CMOS/TTL compatible down to 3.3 V for easy interfacing with control
devices. Matched delays between low-side and high-side sections guarantee no
cycle distortion and allow high frequency operation.
The STDRIVE601 embeds a comparator featuring advanced SmartSD function also
integrated in the device, ensuring fast and effective protection against fault events
like overcurrent, overtemperature, etc.
Dedicated UVLO protection on the low-sides and each of the high-side driving
sections allow to prevent the power switches from operating in low efficiency or
dangerous conditions.
The integrated bootstrap diodes as well as all of the integrated features of this IC
make the application PCB design easier, more compact and simpler, thus reducing
the overall bill of material.
The device is available in SO-28 package.
Product label
DS12949
-
Rev 2
-
April 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
STDRIVE601
Block diagram
1
Block diagram
Figure 1.
Block diagram
VCC
VCC
+5V
D1
BOOT1
VCC UVLO VCC UVLO
DETECTION
VBO UVLO &
Level Shifter
Input
noise filter
HVG1
OUT1
D2
BOOT2
HIN1
+5V
Floating structure
VCC
HIN2
+5V
Input
noise filter
VBO UVLO &
Level Shifter
HVG2
OUT2
D3
BOOT3
HlN3
+5V
Input
noise filter
LOGIC
SHOOT
THROUGH
PREVENTION
DEADTIME
Floating structure
VCC
LIN1
+5V
Input
noise filter
VBO UVLO &
Level Shifter
HVG3
OUT3
VCC
Floating structure
LIN2
+5V
Input
noise filter
LVG1
LlN3
Input
noise filter
VCC
LVG2
EN
EN Input
noise filter
VCC
FAULT
+5V
LVG3
VCC UVLO
I
OD
OD
+5V
SMART
SD
+
+
V
REF
-
PGND
CIN
Comparator
input filter
SGND
DS12949
-
Rev 2
page 2/26
STDRIVE601
Pin description and connection diagram
2
Pin description and connection diagram
Figure 2.
Pin connection (top view)
VCC
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
FAULT
CIN
EN
OD
SGND
PGND
LVG3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
BOOT1
HVG1
OUT1
NC
BOOT2
HVG2
OUT2
NC
BOOT3
HVG3
OUT3
NC
LVG1
LVG2
Table 1.
Pin description
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17, 21 25
18
19
20
22
Pin Name
VCC
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
FAULT
CIN
EN
OD
SGND
PGND
LVG3
(1)
LVG2
(1)
LVG1
(1)
N.C.
OUT3
HVG3
(1)
BOOT3
OUT2
Type
Power Supply
Logic Input
Logic Input
Logic Input
Logic Input
Logic Input
Logic Input
OD Output
Analog Input
Logic Input
OD Output
Power Supply
Power Supply
Analog Output
Analog Output
Analog Output
-
Power Supply
Analog Output
Power Supply
Power Supply
Function
Low-side and logic supply voltage
High-side driver logic input 1
High-side driver logic input 2
High-side driver logic input 3
Low-side driver logic input 1
Low-side driver logic input 2
Low-side driver logic input 3
Fault output
Comparator positive input
Enable input, active high
SmartSD timing Open Drain output, unlatch and restart input
Signal ground
Low-side driver ground
Low-side driver output 3
Low-side driver output 2
Low-side driver output 1
Not Connected
High-side (floating) common voltage driver 3
High-side driver output 3
Bootstrap supply voltage 3
High-side (floating) common voltage driver 2
DS12949
-
Rev 2
page 3/26
STDRIVE601
Pin description and connection diagram
Pin #
23
24
26
27
28
Pin Name
HVG2
(1)
BOOT2
OUT1
HVG1
(1)
BOOT1
Type
Analog Output
Power Supply
Power Supply
Analog Output
Power Supply
High-side driver output 2
Bootstrap supply voltage 2
Function
High-side (floating) common voltage driver 1
High-side driver output 1
Bootstrap supply voltage 1
1. The circuit guarantees less than 1 V on the LVG and HVG pins (at Isink = 10 mA), with VCC > 3 V. This allows omitting the
“bleeder” resistor connected between the gate and the source of the external MOSFETs normally used to hold the pin low.
DS12949
-
Rev 2
page 4/26
STDRIVE601
Electrical data
3
3.1
Electrical data
Absolute maximum ratings
Table 2.
Absolute maximum ratings
Note:
Each voltage referred to SGND unless otherwise specified.
Parameter
Logic supply voltage
Low-side driver ground
Low-side drivers ground
Output voltage
Bootstrap voltage
High-side gate output voltage
Low-side gate output voltage
Comparator input voltage
Logic input voltage
(2)
OD pin voltage
FAULT pin voltage
Common mode transient Immunity
Junction temperature
Storage temperature
Human body model
-40
-50
2
(3)
Min.
-0.3
VCC - 21
-21
V
BOOT
- 21
- 0.3
V
OUT
- 0.3
V
PGND
- 0.3
- 0.3
- 0.3
- 0.3
- 0.3
Max.
21
VCC + 0.3
21
V
BOOT
+ 0.3
620
V
BOOT
+ 0.3
VCC + 0.3
20
15
21
21
50
150
150
Unit
V
V
V
V
V
V
V
V
V
V
V
V/ns
°C
°C
kV
Symbol
VCC
V
PGND
V
PS
(1)
V
OUT
V
BOOT
V
HVG
V
LVG
V
CIN
V
i
V
OD
V
FAULT
dV
OUT
/dt
T
J
T
S
ESD
1. V
PS
= PGND - SGND.
2. EN, LINx, HINx.
3. Pins 18 to 28 have HBM ESD rating 1C conforming to ANSI/ESDA/JEDEC JS-001-2014.
3.2
Thermal data
Table 3.
Thermal data
Symbol
R
th(JA)
1. JEDEC 2s2p PCB in still air.
Parameter
Thermal resistance junction to ambient
(1)
Value
52
Unit
°C/W
DS12949
-
Rev 2
page 5/26
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