2020年03月10日 | TX2440 ARM开发板Uboot移植（三、添加Nand Flash的有关操作支持）

#include
#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include
#if defined(CONFIG_S3C2410)
#include
#define S3C2410_NFSTAT_READY    (1<<0)
#define S3C2410_NFCONF_nFCE     (1<<11)
/* select chip, for s3c2410 */
static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
{
    S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
    if (chip == -1) {
        s3c2410nand->NFCONF |= S3C2410_NFCONF_nFCE;
    } else {
        s3c2410nand->NFCONF &= ~S3C2410_NFCONF_nFCE;
    }
}

static void s3c2410_nand_hwcontrol(struct mtd_info *mtd, int cmd)
{
    S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
    struct nand_chip *chip = mtd->priv;

    switch (cmd) {
    case NAND_CTL_SETNCE:
    s3c2410nand->NFCONF &= ~S3C2410_NFCONF_nFCE;
    case NAND_CTL_CLRNCE:
    s3c2410nand->NFCONF |= S3C2410_NFCONF_nFCE;
        printf("%s: called for NCEn", __FUNCTION__);
        break;
    case NAND_CTL_SETCLE:
        chip->IO_ADDR_W = (void *)&s3c2410nand->NFCMD;
        break;
    case NAND_CTL_SETALE:
        chip->IO_ADDR_W = (void *)&s3c2410nand->NFADDR;
        break;
        /* NAND_CTL_CLRCLE: */
        /* NAND_CTL_CLRALE: */
    default:
        chip->IO_ADDR_W = (void *)&s3c2410nand->NFDATA;
        break;
    }
}

/* s3c2410_nand_devready()
 *
 * returns 0 if the nand is busy, 1 if it is ready
 */
static int s3c2410_nand_devready(struct mtd_info *mtd)
{
    S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
    return (s3c2410nand->NFSTAT & S3C2410_NFSTAT_READY);
}
#elif defined(CONFIG_S3C2440)
#include
#define S3C2440_NFSTAT_READY    (1<<0)
#define S3C2440_NFCONT_nFCE     (1<<1)
/* select chip, for s3c2440 */
static void s3c2440_nand_select_chip(struct mtd_info *mtd, int chip)
{
    S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
    if (chip == -1) {
        s3c2440nand->NFCONT |= S3C2440_NFCONT_nFCE;
    } else {
        s3c2440nand->NFCONT &= ~S3C2440_NFCONT_nFCE;
    }
}

/* command and control functions */
static void s3c2440_nand_hwcontrol(struct mtd_info *mtd, int cmd)
{
    S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
    struct nand_chip *chip = mtd->priv;

    switch (cmd) {
    case NAND_CTL_SETNCE:
    s3c2440nand->NFCONT &= ~S3C2440_NFCONT_nFCE;
    case NAND_CTL_CLRNCE:
    s3c2440nand->NFCONT |= S3C2440_NFCONT_nFCE;
        printf("%s: called for NCEn", __FUNCTION__);
        break;
    case NAND_CTL_SETCLE:
        chip->IO_ADDR_W = (void *)&s3c2440nand->NFCMD;
        break;
    case NAND_CTL_SETALE:
        chip->IO_ADDR_W = (void *)&s3c2440nand->NFADDR;
        break;
        /* NAND_CTL_CLRCLE: */
        /* NAND_CTL_CLRALE: */
    default:
        chip->IO_ADDR_W = (void *)&s3c2440nand->NFDATA;
        break;
    }
}

/* s3c2440_nand_devready()
 *
 * returns 0 if the nand is busy, 1 if it is ready
 */
static int s3c2440_nand_devready(struct mtd_info *mtd)
{
    S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
    return (s3c2440nand->NFSTAT & S3C2440_NFSTAT_READY);
}
#endif
/*
 * Called by drivers/nand/nand.c, initialize the interface of nand flash
 */
int board_nand_init(struct nand_chip *chip)
{
#define TACLS   0
#define TWRPH0  4
#define TWRPH1  2
#if defined(CONFIG_S3C2410)
    S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
  /* Enable NAND flash controller, Initialize ECC, enable chip select, Set flash memory timing */
  s3c2410nand->NFCONF = (1<<15)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0); 
    chip->IO_ADDR_R    = (void *)&s3c2410nand->NFDATA;
    chip->IO_ADDR_W    = (void *)&s3c2410nand->NFDATA;
    chip->hwcontrol    = s3c2410_nand_hwcontrol;
    chip->dev_ready    = s3c2410_nand_devready;
    chip->select_chip  = s3c2410_nand_select_chip;
#elif defined(CONFIG_S3C2440)
    S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
    s3c2440nand->NFCONF = (TACLS<<12)|(TWRPH0<<8)|(TWRPH1<<4);
    /* Initialize ECC, enable chip select, NAND flash controller enable */
    s3c2440nand->NFCONT = (1<<4)|(0<<1)|(1<<0);
    chip->IO_ADDR_R    = (void *)&s3c2440nand->NFDATA;
    chip->IO_ADDR_W    = (void *)&s3c2440nand->NFDATA;
    chip->hwcontrol    = s3c2440_nand_hwcontrol;
    chip->dev_ready    = s3c2440_nand_devready;
    chip->select_chip  = s3c2440_nand_select_chip;
#endif
    chip->options      = 0;
    chip->eccmode       = NAND_ECC_SOFT;
  return 0;
}
#endif