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934056875127

TRANSISTOR 75 A, 36 V, 0.0054 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB, PLASTIC, SC-46, 3 PIN, FET General Purpose Power

器件类别:分立半导体    晶体管   

厂商名称:NXP(恩智浦)

厂商官网:https://www.nxp.com

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
NXP(恩智浦)
零件包装代码
TO-220AB
包装说明
FLANGE MOUNT, R-PSFM-T3
针数
3
Reach Compliance Code
unknown
ECCN代码
EAR99
其他特性
LOGIC LEVEL COMPATIBLE
雪崩能效等级(Eas)
120 mJ
外壳连接
DRAIN
配置
SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压
36 V
最大漏极电流 (ID)
75 A
最大漏源导通电阻
0.0054 Ω
FET 技术
METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码
TO-220AB
JESD-30 代码
R-PSFM-T3
元件数量
1
端子数量
3
工作模式
ENHANCEMENT MODE
封装主体材料
PLASTIC/EPOXY
封装形状
RECTANGULAR
封装形式
FLANGE MOUNT
峰值回流温度(摄氏度)
NOT SPECIFIED
极性/信道类型
N-CHANNEL
最大脉冲漏极电流 (IDM)
240 A
认证状态
Not Qualified
表面贴装
NO
端子形式
THROUGH-HOLE
端子位置
SINGLE
处于峰值回流温度下的最长时间
NOT SPECIFIED
晶体管应用
SWITCHING
晶体管元件材料
SILICON
文档预览
PSMN004-36P/36B
N-channel enhancement mode field-effect transistor
Rev. 01 — 19 November 2001
Product data
1. Description
N-channel logic level field-effect power transistor in a plastic package using
TrenchMOS™
1
technology.
Product availability:
PSMN004-36P in SOT78 (TO-220AB)
PSMN004-36B in SOT404 (D
2
-PAK).
2. Features
s
Very low on-state resistance
s
Fast switching.
3. Applications
s
DC to DC converters
s
Switch mode power supplies.
4. Pinning information
Table 1:
Pin
1
2
3
mb
Pinning - SOT78 and SOT404, simplified outline and symbol
Description
gate (g)
drain (d)
source (s)
drain (d)
g
s
Simplified outline
[1]
mb
mb
Symbol
d
MBB076
2
1
MBK106
3
MBK116
1 2 3
SOT78 (TO-220AB)
[1]
SOT404 (D
2-
PAK)
It is not possible to make connection to pin 2 of the SOT404 package.
1.
TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.
Philips Semiconductors
PSMN004-36P/36B
N-channel enhancement mode field-effect transistor
5. Quick reference data
Table 2:
V
DS
I
D
P
tot
T
j
R
DSon
Quick reference data
Conditions
T
j
= 25 to 175
°C
T
mb
= 25
°C;
V
GS
= 5 V
T
mb
= 25
°C
V
GS
= 10 V; I
D
= 25 A; T
j
= 25°C
V
GS
= 5 V; I
D
= 25 A; T
j
= 25°C
Typ
3.5
4
Max
36
75
230
175
4
5
Unit
V
A
W
°C
mΩ
mΩ
drain-source voltage (DC)
drain current (DC)
total power dissipation
junction temperature
drain-source on-state resistance
Symbol Parameter
6. Limiting values
Table 3:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
DS
V
DGR
V
GS
V
GSM
I
D
I
DM
P
tot
T
stg
T
j
I
S
I
SM
E
AS
drain-source voltage (DC)
drain-gate voltage (DC)
gate-source voltage (DC)
gate-source voltage
drain current (DC)
peak drain current
total power dissipation
storage temperature
operating junction temperature
source (diode forward) current (DC) T
mb
= 25
°C
peak source (diode forward) current T
mb
= 25
°C;
pulsed; t
p
10
µs
non-repetitive avalanche energy
unclamped inductive load;
I
D
= 75 A; t
p
= 0.1 ms; V
DD
= 15 V;
R
GS
= 50
Ω;
V
GS
= 5V; starting T
j
= 25
°C;
unclamped inductive load;
V
DD
= 15 V; R
GS
= 50
Ω;
V
GS
= 5V;
starting T
j
= 25
°C
t
p
50
µs;
pulsed;
duty cycle 25 %; T
j
150
°C
T
mb
= 25
°C;
V
GS
= 5 V;
Figure 2
and
3
T
mb
= 100
°C;
V
GS
= 5 V;
Figure 2
T
mb
= 25
°C;
pulsed; t
p
10
µs;
Figure 3
T
mb
= 25
°C;
Figure 1
Conditions
T
j
= 25 to 175
°C
T
j
= 25 to 175
°C;
R
GS
= 20 kΩ
Min
−55
−55
Max
36
36
±15
±20
75
75
240
230
+175
+175
75
240
120
Unit
V
V
V
V
A
A
A
W
°C
°C
A
A
mJ
Source-drain diode
Avalanche ruggedness
I
AS
non-repetitive avalanche current
75
A
9397 750 08621
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 19 November 2001
2 of 13
Philips Semiconductors
PSMN004-36P/36B
N-channel enhancement mode field-effect transistor
120
Pder
(%)
80
03aa16
03ag42
120
ID
(%)
80
40
40
0
0
50
100
150
200
o
Tmb ( C)
0
0
50
100
150
200
Tmb (ºC)
P
tot
P
der
=
----------------------
×
100%
-
P
°
tot
(
25 C
)
I
D
I
der
=
-------------------
×
100%
I
°
D
(
25 C
)
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Normalized continuous drain current as a
function of mounting base temperature.
103
03ag44
ID
(A)
102
RDS(on) = VDS/ ID
tp = 10 us
100 us
1 ms
DC
10
10 ms
100 ms
1
1
10
VDS (V)
102
T
mb
= 25
°C;
I
DM
is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 08621
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 19 November 2001
3 of 13
Philips Semiconductors
PSMN004-36P/36B
N-channel enhancement mode field-effect transistor
7. Thermal characteristics
Table 4:
R
th(j-mb)
R
th(j-a)
Thermal characteristics
Conditions
Figure 4
vertical in still air; SOT78 package
mounted on a printed circuit board;
minimum footprint; SOT404 package
Value Unit
0.65
60
50
K/W
K/W
K/W
thermal resistance from junction to mounting
base
thermal resistance from junction to ambient
Symbol Parameter
7.1 Transient thermal impedance
1
03ag43
Zth
j-mb
(K/W)
10-1
δ
= 0.5
0.2
0.1
0.05
0.02
10-2
P
δ
=
tp
T
single pulse
tp
T
t
10-3
10-6
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 08621
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 19 November 2001
4 of 13
Philips Semiconductors
PSMN004-36P/36B
N-channel enhancement mode field-effect transistor
8. Characteristics
Table 5:
Characteristics
T
j
= 25
°
C unless otherwise specified.
Symbol Parameter
Static characteristics
V
(BR)DSS
drain-source breakdown voltage
I
D
= 0.25 mA; V
GS
= 0 V
T
j
= 25
°C
T
j
=
−55 °C
V
GS(th)
gate-source threshold voltage
I
D
= 1 mA; V
DS
= V
GS
;
Figure 9
T
j
= 25
°C
T
j
= 175
°C
T
j
=
−55 °C
I
DSS
drain-source leakage current
V
DS
= 30 V; V
GS
= 0 V
T
j
= 25
°C
T
j
= 175
°C
I
GSS
R
DSon
gate-source leakage current
drain-source on-state resistance
V
GS
=
±10
V; V
DS
= 0 V
V
GS
= 5 V; I
D
= 25 A;
Figure 7
and
8
T
j
= 25
°C
T
j
= 175
°C
V
GS
= 4.5 V; I
D
= 25 A;
Figure 7
and
8
T
j
= 25
°C
V
GS
= 10 V; I
D
= 25 A;
Figure 7
and
8
T
j
= 25
°C
Dynamic characteristics
Q
g(tot)
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
V
SD
V
SD
t
rr
Q
r
total gate charge
gate-source charge
gate-drain (Miller) charge
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
turn-on rise time
turn-off delay time
turn-off fall time
source-drain (diode forward) voltage I
S
= 25 A; V
GS
= 0 V;
Figure 12
source-drain (diode forward) voltage I
S
= 75 A; V
GS
= 0 V;
Figure 12
reverse recovery time
recovered charge
I
S
= 20 A; dI
S
/dt =
−100
A/µs; V
GS
= 0 V
V
DD
= 15 V; R
D
= 1.2
Ω;
V
GS
= 5 V; R
G
= 6
Ω;
resistive load
V
GS
= 0 V; V
DS
= 20 V; f = 1 MHz;
Figure 11
I
D
= 75 A; V
DD
= 15 V; V
GS
= 5 V;
Figure 13
97
20
39
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
V
V
ns
µC
3.5
4
mΩ
5.4
mΩ
4
5
9.25
mΩ
mΩ
0.05
1
10
500
100
µA
µA
nA
1
0.5
1.5
2
2.3
V
V
V
36
32
V
V
Conditions
Min
Typ
Max
Unit
6000
1700
1400
45
220
435
320
0.85
1.1
400
1
1.2
Source-drain diode
9397 750 08621
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 19 November 2001
5 of 13
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参数对比
与934056875127相近的元器件有:PSMN004-36B,118、934056874118、PSMN004-36P。描述及对比如下:
型号 934056875127 PSMN004-36B,118 934056874118 PSMN004-36P
描述 TRANSISTOR 75 A, 36 V, 0.0054 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB, PLASTIC, SC-46, 3 PIN, FET General Purpose Power MOSFET N-CH 36V 75A D2PAK TRANSISTOR 75 A, 36 V, 0.0054 ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, SMD, D2PAK-3, FET General Purpose Power TRANSISTOR 75 A, 36 V, 0.0054 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB, PLASTIC, SC-46, 3 PIN, FET General Purpose Power
包装说明 FLANGE MOUNT, R-PSFM-T3 PLASTIC, D2PAK-3 SMALL OUTLINE, R-PSSO-G2 FLANGE MOUNT, R-PSFM-T3
针数 3 3 3 3
Reach Compliance Code unknown unknown unknown unknow
ECCN代码 EAR99 EAR99 EAR99 EAR99
其他特性 LOGIC LEVEL COMPATIBLE LOGIC LEVEL COMPATIBLE LOGIC LEVEL COMPATIBLE LOGIC LEVEL COMPATIBLE
雪崩能效等级(Eas) 120 mJ 120 mJ 120 mJ 120 mJ
外壳连接 DRAIN DRAIN DRAIN DRAIN
配置 SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压 36 V 36 V 36 V 36 V
最大漏极电流 (ID) 75 A 75 A 75 A 75 A
最大漏源导通电阻 0.0054 Ω 0.0054 Ω 0.0054 Ω 0.0054 Ω
FET 技术 METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JESD-30 代码 R-PSFM-T3 R-PSSO-G2 R-PSSO-G2 R-PSFM-T3
元件数量 1 1 1 1
端子数量 3 2 2 3
工作模式 ENHANCEMENT MODE ENHANCEMENT MODE ENHANCEMENT MODE ENHANCEMENT MODE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 FLANGE MOUNT SMALL OUTLINE SMALL OUTLINE FLANGE MOUNT
极性/信道类型 N-CHANNEL N-CHANNEL N-CHANNEL N-CHANNEL
最大脉冲漏极电流 (IDM) 240 A 240 A 240 A 240 A
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified
表面贴装 NO YES YES NO
端子形式 THROUGH-HOLE GULL WING GULL WING THROUGH-HOLE
端子位置 SINGLE SINGLE SINGLE SINGLE
晶体管应用 SWITCHING SWITCHING SWITCHING SWITCHING
晶体管元件材料 SILICON SILICON SILICON SILICON
是否Rohs认证 符合 符合 符合 -
厂商名称 NXP(恩智浦) NXP(恩智浦) - NXP(恩智浦)
零件包装代码 TO-220AB D2PAK - TO-220AB
峰值回流温度(摄氏度) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED -
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED -
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